This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: [PATCH] [MIPS] Fix PR target/91769
- From: Dragan Mladjenovic <dmladjenovic at wavecomp dot com>
- To: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
- Cc: Jeff Law <law at redhat dot com>, Matthew Fortune <mfortune at gmail dot com>, YunQiang Su <wzssyqa at gmail dot com>
- Date: Mon, 30 Sep 2019 09:53:06 +0000
- Subject: Re: [PATCH] [MIPS] Fix PR target/91769
- Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=wavecomp.com; dmarc=pass action=none header.from=wavecomp.com; dkim=pass header.d=wavecomp.com; arc=none
- Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=USMDdDI13EYY0TfOHzR8tbTJeL6XGD70liGx6lVSd70=; b=EIFjo7UJf+sU8bezM7Oo8Gi1UAIPyWLOMO9npqkZHzZr0Wyjt0mG0Yclg6uJ4j7oGiDohc0A67HmEEGuZLciUzi2fwPRqTJC+U74RvbJ19SLLFySPy0Ys/hxgav1ClNhO7Hqml7HIkLgG7ZfSJzhgIk7vkhxfttBmk9y8W1aIG1v7EaFzkoCbGJP6Ezfal+AWv4EHASg0OVtXiscVzQ6QrzAgSokXguZeLTlObkFy3IYEAn+5BQunFgeVSoM4JbpB0vCQef2ARsf/JJ/eoW/cHBy5XLfmf7otp5IdhoGchOObDJJ9JUtW+CrhVMoiDGJ25szsp6r9APa53/ql1GXlQ==
- Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=VOl7nMT2T/sI685ZinlFDlss7qUcVPTQW4dQAjORenXdlBnBkFWvwp5B8yxSEg9YnUP63DZdDUwCPH4Rw3IwQdc4I15c+/hgXlgOtmX42TWRFYWtsiCe38olwmnGbat4VjcXJY4JZfdnmFI3M067mRdh77kRi/j33wcBGDyYIGCmCj10XUp2wpLLgDloDvP0aInlQMlrfpnn0i5Bsjr99XaovddxtvI4smbs1TbzSjZmP/NVcZICiCcTbZGzlMBHMtxbcHmNb+ipz8o/mjki43ypytAjbtVXKErjtRmZ1Pk0gScr495I9XP1M8yZtAZ/eHnR0TDdGsgPSw8JbHUxcQ==
- References: <1569395735-18881-1-git-send-email-dmladjenovic@wavecomp.com>
CC: YunQiang Su
On 25.09.2019. 09:16, Dragan Mladjenovic wrote:
> From: "Dragan Mladjenovic" <dmladjenovic@wavecomp.com>
>
> This fixes the issue by checking that addr's base reg is not part of dest
> multiword reg instead just checking the first reg of dest.
>
> gcc/ChangeLog:
>
> 2019-09-25 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
>
> PR target/91769
> * config/mips/mips.c (mips_split_move): Use reg_overlap_mentioned_p
> instead of REGNO equality check on addr.reg.
>
> gcc/testsuite/ChangeLog:
>
> 2019-09-25 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
>
> PR target/91769
> * gcc.target/mips/pr91769.c: New test.
> ---
>
> Hi all,
>
> Is this OK for trunk?
>
> The test case is a bit crude, but I guess that is better than having none.
>
> On top of that, I would like to backport this along with r273174 onto gcc 9 branch.
> That should fix BZ91702 and BZ91474 reported against gcc 9.2.
>
> Tested on mips-mti-linux-gnu.
>
> Best regards,
> Dragan
>
> gcc/config/mips/mips.c | 2 +-
> gcc/testsuite/gcc.target/mips/pr91769.c | 19 +++++++++++++++++++
> 2 files changed, 20 insertions(+), 1 deletion(-)
> create mode 100644 gcc/testsuite/gcc.target/mips/pr91769.c
>
> diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
> index c682ebd..aa527b4 100644
> --- a/gcc/config/mips/mips.c
> +++ b/gcc/config/mips/mips.c
> @@ -4862,7 +4862,7 @@ mips_split_move (rtx dest, rtx src, enum mips_split_type split_type, rtx insn_)
> {
> rtx tmp = XEXP (src, 0);
> mips_classify_address (&addr, tmp, GET_MODE (tmp), true);
> - if (addr.reg && REGNO (addr.reg) != REGNO (dest))
> + if (addr.reg && !reg_overlap_mentioned_p (dest, addr.reg))
> validate_change (next, &SET_SRC (set), src, false);
> }
> else
> diff --git a/gcc/testsuite/gcc.target/mips/pr91769.c b/gcc/testsuite/gcc.target/mips/pr91769.c
> new file mode 100644
> index 0000000..b856183
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/mips/pr91769.c
> @@ -0,0 +1,19 @@
> +/* PR target/91769 */
> +/* { dg-do compile } */
> +/* { dg-skip-if "naming registers makes this a code quality test" { *-*-* } { "-O0" "-g" } { "" } } */
> +/* { dg-options "-EL -mgp32 -mhard-float" } */
> +
> +NOCOMPRESSION double
> +foo (void)
> +{
> + register double* pf __asm__ ("$a1");
> + __asm__ __volatile__ ("":"=r"(pf));
> + double f = *pf;
> +
> + if (f != f)
> + f = -f;
> + return f;
> +}
> +
> +/* { dg-final { scan-assembler-not "lw\t\\\$4,0\\(\\\$5\\)\n\tlw\t\\\$5,4\\(\\\$5\\)\n\tldc1\t\\\$.*,0\\(\\\$5\\)" } } */
> +/* { dg-final { scan-assembler "lw\t\\\$4,0\\(\\\$5\\)\n\tlw\t\\\$5,4\\(\\\$5\\)\n\tmtc1\t\\\$4,\\\$.*\n\tmthc1\t\\\$5,\\\$.*" } } */
>