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Re: [AArch64][SVE2] Shift-Right Accumulate combine patterns
- From: Richard Sandiford <richard dot sandiford at arm dot com>
- To: Yuliang Wang <Yuliang dot Wang at arm dot com>
- Cc: "gcc-patches\@gcc.gnu.org" <gcc-patches at gcc dot gnu dot org>, nd <nd at arm dot com>
- Date: Fri, 27 Sep 2019 09:12:35 +0100
- Subject: Re: [AArch64][SVE2] Shift-Right Accumulate combine patterns
- References: <AM0PR08MB37165A3B126DFDFA35D347BB9B860@AM0PR08MB3716.eurprd08.prod.outlook.com>
Yuliang Wang <Yuliang.Wang@arm.com> writes:
> Hi,
>
> This patch adds combining support for SVE2's shift-right accumulate instructions.
>
> Example snippet:
>
> #define IMM ...
>
> void foo (TYPE a, TYPE b, int n)
> {
> for (int i = 0; i < n; i++)
> a[i] += b[i] >> IMM;
> }
>
> Signed:
>
> before asr z0.s, z0.s, #{IMM}
> add z0.s, z0.s, z1.s
> ...
> after ssra z0.s, z1.s, #{IMM}
>
> Unsigned:
>
> before lsr z0.s, z0.s, #{IMM}
> add z0.s, z0.s, z1.s
> ...
> after usra z0.s, z1.s, #{IMM}
>
> Built and regression tested on aarch64-none-elf.
>
> Best Regards,
> Yuliang Wang
>
>
> gcc/ChangeLog:
>
> 2019-09-26 Yuliang Wang <yuliang.wang@arm.com>
>
> * config/aarch64/aarch64-sve2.md (aarch64_sve2_sra<mode>):
> New combine pattern.
>
> gcc/testsuite/ChangeLog:
>
> 2019-09-26 Yuliang Wang <yuliang.wang@arm.com>
>
> * gcc.target/aarch64/sve2/shracc_1.c: New test.
Thanks, applied as r276174.
Richard