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Re: Problem exposed by recent ARM multiply changes


On Wed, Sep 25, 2019 at 10:06:13PM -0600, Jeff Law wrote:
> (insn 14 13 16 2 (parallel [
>             (set (reg:SI 132)
>                 (plus:SI (mult:SI (zero_extend:DI (reg/v:SI 115 [ sec ]))
>                         (zero_extend:DI (reg:SI 124)))
>                     (reg:SI 130)))
>             (set (reg:SI 133 [+4 ])
>                 (plus:SI (truncate:SI (lshiftrt:DI (plus:DI (mult:DI
> (zero_extend:DI (reg/v:SI 115 [ sec ]))
>                                     (zero_extend:DI (reg:SI 124)))
>                                 (zero_extend:DI (reg:SI 130)))
>                             (const_int 32 [0x20])))
>                     (reg:SI 131 [+4 ])))
>         ]) "j.c":10:54 60 {umlal}
>      (expr_list:REG_DEAD (reg:SI 131 [+4 ])
>         (expr_list:REG_DEAD (reg:SI 130)
>             (expr_list:REG_DEAD (reg:SI 124)
>                 (expr_list:REG_DEAD (reg/v:SI 115 [ sec ])
>                     (nil))))))

This is not a correct pattern for umlal (it should have a carry from the
low half of the addition to the high half).


Segher


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