This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: [PATCH] i386: Increase Skylake SImode pseudo register store cost


On Wed, Sep 18, 2019 at 8:04 PM H.J. Lu <hjl.tools@gmail.com> wrote:
>
> On Skylake, SImode store cost isn't less than half cost of 128-bit vector
> store.  This patch increases Skylake SImode pseudo register store cost to
> make it the same as QImode and HImode.
>
> gcc/
>
> PR target/91446
> * config/i386/x86-tune-costs.h (skylake_cost): Increase SImode
> pseudo register store cost from 3 to 6 to make it the same as
> QImode and HImode.
>
> gcc/testsuite/
>
> PR target/91446
> * gcc.target/i386/pr91446.c: New test.
>
> OK for trunk?

I assume these tunings are backed by some benchmark results. So, OK.

Thanks,
Uros.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]