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Re: [PATCH, AArch64, v3 0/6] LSE atomics out-of-line
- From: Richard Henderson <rth at twiddle dot net>
- To: Wilco Dijkstra <Wilco dot Dijkstra at arm dot com>, Kyrill Tkachov <kyrylo dot tkachov at foss dot arm dot com>, Richard Henderson <richard dot henderson at linaro dot org>, GCC Patches <gcc-patches at gcc dot gnu dot org>
- Cc: nd <nd at arm dot com>, Ramana Radhakrishnan <Ramana dot Radhakrishnan at arm dot com>, "agraf at suse dot de" <agraf at suse dot de>, Marcus Shawcroft <Marcus dot Shawcroft at arm dot com>, James Greenhalgh <James dot Greenhalgh at arm dot com>
- Date: Tue, 17 Sep 2019 14:11:05 -0700
- Subject: Re: [PATCH, AArch64, v3 0/6] LSE atomics out-of-line
- References: <VI1PR0801MB212764F895C50D4A51E7748183BB0@VI1PR0801MB2127.eurprd08.prod.outlook.com> <5c4cbe49-8613-b9e4-9011-df26ced40a35@linaro.org> <VI1PR0801MB2127EAFC3FFF12EEB1A15BAD838C0@VI1PR0801MB2127.eurprd08.prod.outlook.com> <790aabf8-5edc-eb7a-b4ec-cccef74e403a@foss.arm.com> <HE1PR0801MB21215CF323CAEFD81C53AED9838F0@HE1PR0801MB2121.eurprd08.prod.outlook.com>
On 9/17/19 6:55 AM, Wilco Dijkstra wrote:
> Hi Kyrill,
>
>>> When you select a CPU the goal is that we optimize and schedule for that
>>> specific microarchitecture. That implies using atomics that work best for
>>> that core rather than outlining them.
>>
>> I think we want to go ahead with this framework to enable the portable
>> deployment of LSE atomics.
>>
>> More CPU-specific fine-tuning can come later separately.
>
> I'm not talking about CPU-specific fine-tuning, but ensuring we don't penalize
> performance when a user selects the specific CPU their application will run on.
> And in that case outlining is unnecessary.
>From aarch64_override_options:
Given both -march=foo -mcpu=bar, then the architecture will be foo and -mcpu
will be treated as -mtune=bar, but will not use any insn not in foo.
Given only -mcpu=foo, then the architecture will be the one supported by foo.
So if foo supports LSE, then we will not outline the functions, no matter how
we arrive at foo.
r~
- References:
- Re: [PATCH, AArch64, v3 0/6] LSE atomics out-of-line
- Re: [PATCH, AArch64, v3 0/6] LSE atomics out-of-line
- Re: [PATCH, AArch64, v3 0/6] LSE atomics out-of-line
- Re: [PATCH, AArch64, v3 0/6] LSE atomics out-of-line
- Re: [PATCH, AArch64, v3 0/6] LSE atomics out-of-line