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Re: [Question on aarch64] Questions on TLB range instructions on aarch64


Hi Kyrill,

On 2019/9/17 19:24, Kyrill Tkachov wrote:
> Hi Shaokun,
> 
> On 9/17/19 12:17 PM, Shaokun Zhang wrote:
>> Hi aarch64 maintainers,
>>
>> Sorry to noise you again.
>>
> No problem :) However, this isn't strictly-speaking a gcc issue because...
> 
> 
>> We(HiSilicon) next generation CPU core will support "ARMv8.4-TLBI, TLB maintenance and TLB range instructions"
>> feature, so I try to compile it that tlbi rvae1is is replaced in linux kernel which is in my local branch,
>> there are some error messages:
>>
>> /tmp/ccD5TFDe.s: Assembler messages:
>> /tmp/ccD5TFDe.s:991: Error: unknown or missing operation name at operand 1 -- `tlbi rvae1is,x0'
>> /tmp/ccD5TFDe.s:1012: Error: unknown or missing operation name at operand 1 -- `tlbi rvae1is,x0'
>> /tmp/ccD5TFDe.s:1794: Error: unknown or missing operation name at operand 1 -- `tlbi rvae1is,x0'
>> /tmp/ccD5TFDe.s:1815: Error: unknown or missing operation name at operand 1 -- `tlbi rvae1is,x0'
>> /tmp/ccD5TFDe.s:2398: Error: unknown or missing operation name at operand 1 -- `tlbi rvae1is,x0'
>> /tmp/ccD5TFDe.s:2419: Error: unknown or missing operation name at operand 1 -- `tlbi rvae1is,x0'
>> /tmp/ccD5TFDe.s:3155: Error: unknown or missing operation name at operand 1 -- `tlbi rvae1is,x0'
>> /tmp/ccD5TFDe.s:3176: Error: unknown or missing operation name at operand 1 -- `tlbi rvae1is,x0'
>> /tmp/ccD5TFDe.s:1016: Error: attempt to move .org backwards
>> /tmp/ccD5TFDe.s:1819: Error: attempt to move .org backwards
>> /tmp/ccD5TFDe.s:2423: Error: attempt to move .org backwards
>> /tmp/ccD5TFDe.s:3180: Error: attempt to move .org backwards
>> make[2]: *** [arch/arm64/mm/hugetlbpage.o] Error 1
>> make[1]: *** [arch/arm64/mm] Error 2
>> make: *** [sub-make] Error 2
>>
> 
> ... These are assembler messages from gas.
> 
> These system registers should be supported in more recent binutils versions.
> 

Oh, My poor knowledge on it, thanks your suggestion.
I checked it that my binutils version is 2.27-34 which is 3 years ago.

> They were added with https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=793a194839bc8add71fdc7429c58b10f0667a6f6
> 
> I suggest you update your binutils to a later version to get the support.
> 

It needs 2_30 version which has merged the patch of you sent the link. I will update it:-P

Thanks Kyrill,

Shaokun

> Thanks,
> 
> Kyrill
> 
> 
>> GCC version is as follow:
>> gcc (GCC) 9.2.0
>> Copyright (C) 2019 Free Software Foundation, Inc.
>> This is free software; see the source for copying conditions.  There is NO
>> warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
>>
>> It seems that GCC doesn't support this new instruction and I checked that LLVM has already supported
>> this instruction,
>> https://github.com/llvm-mirror/llvm/blob/master/lib/Target/AArch64/AArch64SystemOperands.td
>>
>> So my question is that does GCC have the plan to support this instruction recently?
>> If not, can you give me some suggestion to do it? I'm not the expert on it  ;-)
>>
>> Thanks in advance,
>> Shaokun
>>
> 
> .
> 


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