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[PATCH, i386]: Fix PR91719, emit XCHG for seq_cst store on big cores

From: Uros Bizjak <ubizjak at gmail dot com>
To: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
Date: Mon, 16 Sep 2019 20:43:42 +0200
Subject: [PATCH, i386]: Fix PR91719, emit XCHG for seq_cst store on big cores

Attached patch emits XCHG instead of store+MFENCE on big cores and
generic tuning

m_CORE_ALL | m_BDVER | m_ZNVER | m_GENERIC

(The tune can be added for other targets, too.)

2019-09-16  Uroš Bizjak  <ubizjak@gmail.com>

    PR target/91719
    * config/i386/i386.h (TARGET_USE_XCHG_FOR_ATOMIC_STORE): New macro.
    * config/i386/x86-tune.def (X86_TUNE_USE_XCHG_FOR_ATOMIC_STORE): New.
    * config/i386/sync.md (atomic_store<mode>): emit XCHG for
    TARGET_USE_XCHG_FOR_ATOMIC_STORE.

Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

Committed to mainline SVN.

Uros.

Attachment: p.diff.txt
Description: Text document

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