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Re: [ARM/FDPIC v5 13/21] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture

Hi Christophe,

On 5/15/19 1:39 PM, Christophe Lyon wrote:
Without this, when we are unwinding across a signal frame we can jump
to an even address which leads to an exception.

This is needed in __gnu_persnality_sigframe_fdpic() when restoring the
PC from the signal frame since the PC saved by the kernel has the LSB
bit set to zero.

2019-XX-XX  Christophe Lyon  <>
        Mickaël Guêné <>

        * config/arm/unwind-arm.c (_Unwind_VRS_Set): Handle v7m

Change-Id: Ie84de548226bcf1751e19a09e8f091fb3013ccea

diff --git a/libgcc/config/arm/unwind-arm.c b/libgcc/config/arm/unwind-arm.c
index 9ba73e7..ba47150 100644
--- a/libgcc/config/arm/unwind-arm.c
+++ b/libgcc/config/arm/unwind-arm.c
@@ -199,6 +199,11 @@ _Unwind_VRS_Result _Unwind_VRS_Set (_Unwind_Context *context,
         return _UVRSR_FAILED;

       vrs->core.r[regno] = *(_uw *) valuep;
+#if defined(__ARM_ARCH_7M__)
+      /* Force LSB bit since we always run thumb code.  */
+      if (regno == 15)
+       vrs->core.r[regno] |= 1;

Hmm, this looks quite specific. There are other architectures that are thumb-only too (6-M, 7E-M etc).

Would checking for __thumb__ be better?



       return _UVRSR_OK;

     case _UVRSC_VFP:

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