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Re: [PATCH 7/9][GCC][Arm] Enable autovectorization of Half float values
- From: Kyrill Tkachov <kyrylo dot tkachov at foss dot arm dot com>
- To: Tamar Christina <Tamar dot Christina at arm dot com>, "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
- Cc: nd <nd at arm dot com>, Ramana Radhakrishnan <Ramana dot Radhakrishnan at arm dot com>, Richard Earnshaw <Richard dot Earnshaw at arm dot com>, "nickc at redhat dot com" <nickc at redhat dot com>
- Date: Fri, 21 Dec 2018 11:01:53 +0000
- Subject: Re: [PATCH 7/9][GCC][Arm] Enable autovectorization of Half float values
- References: <20181111102751.GA4667@arm.com>
On 11/11/18 10:27, Tamar Christina wrote:
The AArch32 backend is currently not able to support autovectorization of half-float values
on ARM. This is because we never told the vectorizer what the vector modes are for Half floats.
This enables autovectorization by definiting V4HF and V8HF as the vector modes.
Bootstrap and Regtest on aarch64-none-linux-gnu, arm-none-gnueabihf and x86_64-pc-linux-gnu
are still on going but previous patch showed no regressions.
Did the testing go okay in the end?
This looks ok to me but can you provide an example, or better yet, add a test that demonstrates this changes?
Ok for trunk?
2018-11-11 Tamar Christina <email@example.com>
* config/arm/arm.c (arm_preferred_simd_mode): Add V4HF and V8HF.