This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: [ping] allow target configurations to state R18 as reserved on arrch64
- From: Wilco Dijkstra <Wilco dot Dijkstra at arm dot com>
- To: Olivier Hainque <hainque at adacore dot com>, GCC Patches <gcc-patches at gcc dot gnu dot org>
- Cc: Kyrylo Tkachov <Kyrylo dot Tkachov at arm dot com>, nd <nd at arm dot com>
- Date: Wed, 12 Dec 2018 16:11:49 +0000
- Subject: Re: [ping] allow target configurations to state R18 as reserved on arrch64
- References: <C65D6957-C57D-4F84-BBC4-5C4B583A8BE6@adacore.com>
Hi Oliver,
+#define FIXED_R18 0
{ \
0, 0, 0, 0, 0, 0, 0, 0, /* R0 - R7 */ \
0, 0, 0, 0, 0, 0, 0, 0, /* R8 - R15 */ \
- 0, 0, 0, 0, 0, 0, 0, 0, /* R16 - R23 */ \
+ 0, 0, FIXED_R18, 0, 0, 0, 0, 0, /* R16 - R23 */ \
This is equivalent to having a zero in the table given the #define is unconditional.
It's best to use the existing mechanisms to change registers, this should be done
in aarch64_conditional_register_usage given very similar changes for floating
point and SVE are already there.
Cheers,
Wilco