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Re: [patch][x86_64]: AMD znver2 enablement
- From: Uros Bizjak <ubizjak at gmail dot com>
- To: "Kumar, Venkataramanan" <Venkataramanan dot Kumar at amd dot com>
- Cc: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>, Jan Hubicka <hubicka at ucw dot cz>
- Date: Fri, 2 Nov 2018 16:36:14 +0100
- Subject: Re: [patch][x86_64]: AMD znver2 enablement
- References: <CY4PR12MB14621BCA9F3D91DEA0F745328FCD0@CY4PR12MB1462.namprd12.prod.outlook.com>
On Wed, Oct 31, 2018 at 6:25 AM Kumar, Venkataramanan
<Venkataramanan.Kumar@amd.com> wrote:
>
> Hi Maintainers,
>
> PFA, the patch that enables support for the next generation AMD Zen CPU via -march=znver2.
> As of now, znver2 is using the same costs and scheduler descriptions written for znver1.
>
> We will update scheduler descriptions and costing for znver2 later as we get more information.
>
> Ok for trunk?
>
> Regards,
> Venkat.
>
> ChangeLog gcc:
> * common/config/i386/i386-common.c (processor_alias_table): Add znver2 entry.
> * config.gcc (i[34567]86-*-linux* | ...): Add znver2.
> (case ${target}): Add znver2.
> * config/i386/driver-i386.c: (host_detect_local_cpu): Let
> -march=native recognize znver2 processors.
> * config/i386/i386-c.c (ix86_target_macros_internal): Add znver2.
> * config/i386/i386.c (m_znver2): New definition.
> (m_ZNVER): New definition.
> (m_AMD_MULTIPLE): Includes m_znver2.
> (processor_cost_table): Add znver2 entry.
> (processor_target_table): Add znver2 entry.
> (get_builtin_code_for_version): Set priority for
> PROCESSOR_ZNVER2.
> (processor_model): Add M_AMDFAM17H_ZNVER2.
> (arch_names_table): Ditto.
> (ix86_reassociation_width): Include znver2.
> * config/i386/i386.h (TARGET_znver2): New definition.
> (struct ix86_size_cost): Add TARGET_ZNVER2.
> (enum processor_type): Add PROCESSOR_ZNVER2.
> * config/i386/i386.md (define_attr "cpu"): Add znver2.
> * config/i386/x86-tune-costs.h: (processor_costs) Add znver2 costs.
> * config/i386/x86-tune-sched.c: (ix86_issue_rate): Add znver2.
> (ix86_adjust_cost): Add znver2.
> * config/i386/x86-tune.def: Replace m_ZNVER1 by m_ZNVER
> * gcc/doc/extend.texi: Add details about znver2.
> * gcc/doc/invoke.texi: Add details about znver2.
>
> ChangeLog libgcc
> * config/i386/cpuinfo.c: (get_amd_cpu): Add znver2.
> (processor_subtypes): Ditto.
diff --git a/libgcc/config/i386/cpuinfo.h b/libgcc/config/i386/cpuinfo.h
index 0aa887b..86cb4ea 100644
--- a/libgcc/config/i386/cpuinfo.h
+++ b/libgcc/config/i386/cpuinfo.h
@@ -67,6 +67,7 @@ enum processor_subtypes
AMDFAM15H_BDVER3,
AMDFAM15H_BDVER4,
AMDFAM17H_ZNVER1,
+ AMDFAM17H_ZNVER2,
INTEL_COREI7_IVYBRIDGE,
INTEL_COREI7_HASWELL,
INTEL_COREI7_BROADWELL,
As the comment above these enums says:
/* Any new types or subtypes have to be inserted at the end. */
So, please add new entry at the end of enum processor_types.
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 963c7fc..bbe3bb3 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -32269,6 +32276,7 @@ fold_builtin_cpu (tree fndecl, tree *args)
M_AMDFAM15H_BDVER3,
M_AMDFAM15H_BDVER4,
M_AMDFAM17H_ZNVER1,
+ M_AMDFAM17H_ZNVER2,
M_INTEL_COREI7_IVYBRIDGE,
M_INTEL_COREI7_HASWELL,
M_INTEL_COREI7_BROADWELL,
The above also have to be in sync with enum processor_subtypes.
Otherwise LGTM.
Uros.