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[PATCH] rs6000: Add another Z to go with Y (PR87224)
- From: Segher Boessenkool <segher at kernel dot crashing dot org>
- To: gcc-patches at gcc dot gnu dot org
- Cc: dje dot gcc at gmail dot com, Segher Boessenkool <segher at kernel dot crashing dot org>
- Date: Fri, 14 Sep 2018 15:20:28 +0000
- Subject: [PATCH] rs6000: Add another Z to go with Y (PR87224)
This is another case where we ICE because Y does not allow reg+reg, we
need Z for that.
Committing.
Segher
2018-09-14 Segher Boessenkool <segher@kernel.crashing.org>
PR target/87224
* config/rs6000/rs6000.md (*mov<mode>_hardfloat64): Add Z to the Y
alternatives.
---
gcc/config/rs6000/rs6000.md | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index e40dc42..b0889df 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -7455,13 +7455,13 @@ (define_insn "*mov<mode>_hardfloat64"
[(set (match_operand:FMOVE64 0 "nonimmediate_operand"
"=m, d, d, <f64_p9>, wY,
<f64_av>, Z, <f64_vsx>, <f64_vsx>, !r,
- Y, r, !r, *c*l, !r,
+ YZ, r, !r, *c*l, !r,
*h, r, wg, r, <f64_dm>")
(match_operand:FMOVE64 1 "input_operand"
"d, m, d, wY, <f64_p9>,
Z, <f64_av>, <f64_vsx>, <zero_fp>, <zero_fp>,
- r, Y, r, r, h,
+ r, YZ, r, r, h,
0, wg, r, <f64_dm>, r"))]
"TARGET_POWERPC64 && TARGET_HARD_FLOAT
--
1.8.3.1