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Re: [AArch64] Fix -mlow-precision-div (PR 86838)
- From: James Greenhalgh <james dot greenhalgh at arm dot com>
- To: <gcc-patches at gcc dot gnu dot org>, <richard dot earnshaw at arm dot com>, <marcus dot shawcroft at arm dot com>, <richard dot sandiford at arm dot com>
- Cc: <nd at arm dot com>
- Date: Tue, 7 Aug 2018 16:18:27 +0100
- Subject: Re: [AArch64] Fix -mlow-precision-div (PR 86838)
- References: <87zhy379bm.fsf@arm.com>
On Fri, Aug 03, 2018 at 10:34:37AM -0500, Richard Sandiford wrote:
> The "@" handling broke -mlow-precision-div, because the scalar forms of
> the instruction were provided by a pattern that also provided FRECPX
> (and so were parameterised on an unspec code as well as a mode),
> while the SIMD versions had a dedicated FRECPE pattern. This patch
> moves the scalar FRECPE handling to the SIMD pattern too (as for FRECPS)
> and uses a separate pattern for FRECPX.
>
> The convention in aarch64-simd-builtins.def seemed to be to add
> comments only if the mapping wasn't obvious (i.e. not just sticking
> "aarch64_" on the beginning and "<mode>" on the end), so the patch
> deletes the reference to the combined pattern instead of rewording it.
>
> There didn't seem to be any coverage of -mlow-precision-div in the
> testsuite, so the patch adds some tests for it.
>
> Tested on aarch64-linux-gnu. OK to install?
OK.
Thanks,
James
>
> Richard
>
>
> 2018-08-03 Richard Sandiford <richard.sandiford@arm.com>
>
> gcc/
> PR target/86838
> * config/aarch64/iterators.md (FRECP, frecp_suffix): Delete.
> * config/aarch64/aarch64-simd.md
> (aarch64_frecp<FRECP:frecp_suffix><mode>): Fold FRECPE into...
> (@aarch64_frecpe<mode>): ...here and the move FRECPX to...
> (aarch64_frecpx<mode>): ...this new pattern.
> * config/aarch64/aarch64-simd-builtins.def: Remove comment
> about aarch64_frecp<FRECP:frecp_suffix><mode>.
>
> gcc/testsuite/
> PR target/86838
> * gcc.target/aarch64/frecpe_1.c: New test.
> * gcc.target/aarch64/frecpe_2.c: Likewise.
>