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Re: [Patch-86512]: Subnormal float support in armv7(with -msoft-float) for intrinsics


On 27/07/18 17:45, Nicolas Pitre wrote:
> On Fri, 27 Jul 2018, Wilco Dijkstra wrote:
> 
>> Nicolas Pitre wrote:
>>
>>>> However if r4 is non-zero, the carry will be set, and the tsths will be executed. This
>>>> clears the carry and sets the Z flag based on bit 20.
>>>
>>> No, not at all. The carry is not affected. And that's the point of the 
>>> tst instruction here rather than a cmp: it sets the N and Z flags but 
>>> leaves C alone as there is no shifter involved.
>>
>> No, the carry is always set by logical operations with a shifted immediate. It is only
>> unchanged if the immediate uses a zero rotate. So any shifted immediate > 255
>> will set the carry.
> 
> Holy cow !!!
> 
> Who knows all the bugs I must have created in the past 25 years having 
> missed this particular subtlety.
> 
> Here's the updated patch with your suggestion.
> 

Thanks.

Committed.

R.

> 
> fix.patch
> 
> 
> diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog
> index c13bf4cb2f6..c19d05c8a2e 100644
> --- a/libgcc/ChangeLog
> +++ b/libgcc/ChangeLog
> @@ -1,3 +1,9 @@
> +2018-07-26  Nicolas Pitre <nico@fluxnic.net>
> +
> +	* config/arm/ieee754-df.S: Don't shortcut denormal handling when
> +	exponent goes negative. Update my email address.
> +	* config/arm/ieee754-sf.S: Likewise.
> +
>  2018-07-05  James Clarke  <jrtc27@jrtc27.com>
>  
>  	* configure: Regenerated.
> diff --git a/libgcc/config/arm/ieee754-df.S b/libgcc/config/arm/ieee754-df.S
> index 8741aa99245..9a1b2dd2a4e 100644
> --- a/libgcc/config/arm/ieee754-df.S
> +++ b/libgcc/config/arm/ieee754-df.S
> @@ -1,7 +1,7 @@
>  /* ieee754-df.S double-precision floating point support for ARM
>  
>     Copyright (C) 2003-2018 Free Software Foundation, Inc.
> -   Contributed by Nicolas Pitre (nico@cam.org)
> +   Contributed by Nicolas Pitre (nico@fluxnic.net)
>  
>     This file is free software; you can redistribute it and/or modify it
>     under the terms of the GNU General Public License as published by the
> @@ -238,9 +238,10 @@ LSYM(Lad_a):
>  	movs	ip, ip, lsl #1
>  	adcs	xl, xl, xl
>  	adc	xh, xh, xh
> -	tst	xh, #0x00100000
> -	sub	r4, r4, #1
> -	bne	LSYM(Lad_e)
> +	subs	r4, r4, #1
> +	do_it	hs
> +	cmphs	xh, #0x00100000
> +	bhs	LSYM(Lad_e)
>  
>  	@ No rounding necessary since ip will always be 0 at this point.
>  LSYM(Lad_l):
> diff --git a/libgcc/config/arm/ieee754-sf.S b/libgcc/config/arm/ieee754-sf.S
> index d80d5e9080c..b8a81279a3c 100644
> --- a/libgcc/config/arm/ieee754-sf.S
> +++ b/libgcc/config/arm/ieee754-sf.S
> @@ -1,7 +1,7 @@
>  /* ieee754-sf.S single-precision floating point support for ARM
>  
>     Copyright (C) 2003-2018 Free Software Foundation, Inc.
> -   Contributed by Nicolas Pitre (nico@cam.org)
> +   Contributed by Nicolas Pitre (nico@fluxnic.net)
>  
>     This file is free software; you can redistribute it and/or modify it
>     under the terms of the GNU General Public License as published by the
> @@ -168,10 +168,11 @@ LSYM(Lad_e):
>  LSYM(Lad_a):
>  	movs	r1, r1, lsl #1
>  	adc	r0, r0, r0
> -	tst	r0, #0x00800000
> -	sub	r2, r2, #1
> -	bne	LSYM(Lad_e)
> -	
> +	subs	r2, r2, #1
> +	do_it	hs
> +	cmphs	r0, #0x00800000
> +	bhs	LSYM(Lad_e)
> +
>  	@ No rounding necessary since r1 will always be 0 at this point.
>  LSYM(Lad_l):
>  
> 


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