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[4/5] C-SKY port v2: Testsuite


2018-07-30  Sandra Loosemore  <sandra@codesourcery.com>
            Chung-Lin Tang  <cltang@codesourcery.com>
            Xianmiao Qu  <xianmiao_qu@c-sky.com>

        C-SKY port: Testsuite

        gcc/testsuite/
        * g++.dg/Wno-frame-address.C: Adjust for C-SKY.
        * g++.dg/torture/type-generic-1.C: Likewise.
        * gcc.c-torture/compile/20000804-1.c: Likewise.
        * gcc.c-torture/execute/20101011-1.c: Likewise.
        * gcc.c-torture/execute/ieee/mul-subnormal-single-1.x: Likewise.
        * gcc.dg/20020312-2.c: Likewise.
        * gcc.dg/Wno-frame-address.c: Likewise.
        * gcc.dg/c11-true_min-1.c: Likewise.
        * gcc.dg/sibcall-10.c: Likewise.
        * gcc.dg/sibcall-9.c: Likewise.
        * gcc.dg/stack-usage-1.c: Likewise.
        * gcc.dg/torture/float32-tg-3.c: Likewise.
        * gcc.dg/torture/float32x-tg-3.c: Likewise.
        * gcc.dg/torture/float64-tg-3.c: Likewise.
        * gcc.dg/torture/float64x-tg-3.c: Likewise.
        * gcc.dg/torture/type-generic-1.c: Likewise.
        * gcc.target/csky/*: New.
        * lib/target-supports.exp (check_profiling_available): Add
        csky-*-elf.
        (check_effective_target_hard_float): Handle C-SKY targets with
        single-precision hard float only.
        (check_effective_target_logical_op_short_circuit): Handle C-SKY.
diff --git a/gcc/testsuite/g++.dg/Wno-frame-address.C b/gcc/testsuite/g++.dg/Wno-frame-address.C
index a2df034..54a02fe 100644
--- a/gcc/testsuite/g++.dg/Wno-frame-address.C
+++ b/gcc/testsuite/g++.dg/Wno-frame-address.C
@@ -1,5 +1,5 @@
 // { dg-do compile }
-// { dg-skip-if "Cannot access arbitrary stack frames." { arm*-*-* hppa*-*-* ia64-*-* } }
+// { dg-skip-if "Cannot access arbitrary stack frames." { arm*-*-* hppa*-*-* ia64-*-* csky*-*-* } }
 // { dg-options "-Werror" }
 // { dg-additional-options "-mbackchain" { target s390*-*-* } }
 
diff --git a/gcc/testsuite/g++.dg/torture/type-generic-1.C b/gcc/testsuite/g++.dg/torture/type-generic-1.C
index 4d82592..7708724 100644
--- a/gcc/testsuite/g++.dg/torture/type-generic-1.C
+++ b/gcc/testsuite/g++.dg/torture/type-generic-1.C
@@ -4,6 +4,7 @@
 /* { dg-do run } */
 /* { dg-add-options ieee } */
 /* { dg-skip-if "No Inf/NaN support" { spu-*-* } } */
+/* { dg-skip-if "No subnormal support" { csky-*-* } { "-mhard-float" } } */
 
 #include "../../gcc.dg/tg-tests.h"
 
diff --git a/gcc/testsuite/gcc.c-torture/compile/20000804-1.c b/gcc/testsuite/gcc.c-torture/compile/20000804-1.c
index 5c6b731..35464c2 100644
--- a/gcc/testsuite/gcc.c-torture/compile/20000804-1.c
+++ b/gcc/testsuite/gcc.c-torture/compile/20000804-1.c
@@ -4,6 +4,7 @@
 /* { dg-skip-if "" { { i?86-*-* x86_64-*-* } && { ia32 && { ! nonpic } } } } */
 /* { dg-skip-if "No 64-bit registers" { m32c-*-* } } */
 /* { dg-skip-if "Not enough 64-bit registers" { pdp11-*-* } { "-O0" } { "" } } */
+/* { dg-xfail-if "Inconsistent constraint on asm" { csky-*-* } { "-O0" } { "" } } */
 /* { dg-xfail-if "" { h8300-*-* } } */
 
 /* Copyright (C) 2000, 2003 Free Software Foundation */
diff --git a/gcc/testsuite/gcc.c-torture/execute/20101011-1.c b/gcc/testsuite/gcc.c-torture/execute/20101011-1.c
index dda49a5..f95d900 100644
--- a/gcc/testsuite/gcc.c-torture/execute/20101011-1.c
+++ b/gcc/testsuite/gcc.c-torture/execute/20101011-1.c
@@ -93,6 +93,10 @@ __aeabi_idiv0 (int return_value)
 #elif defined (__nvptx__)
 /* There isn't even a signal function.  */
 # define DO_TEST 0
+#elif defined (__csky__)
+  /* This presently doesn't raise SIGFPE even on csky-linux-gnu, much
+     less bare metal.  See the implementation of __divsi3 in libgcc.  */
+# define DO_TEST 0
 #else
 # define DO_TEST 1
 #endif
diff --git a/gcc/testsuite/gcc.c-torture/execute/ieee/mul-subnormal-single-1.x b/gcc/testsuite/gcc.c-torture/execute/ieee/mul-subnormal-single-1.x
index 16df951..ee40863 100644
--- a/gcc/testsuite/gcc.c-torture/execute/ieee/mul-subnormal-single-1.x
+++ b/gcc/testsuite/gcc.c-torture/execute/ieee/mul-subnormal-single-1.x
@@ -1,3 +1,8 @@
+if {[istarget "csky-*-*"] && [check_effective_target_hard_float]} {
+    # The C-SKY hardware FPU only supports flush-to-zero mode.
+    set torture_execute_xfail "csky-*-*"
+    return 1
+}
 if [istarget "epiphany-*-*"] {
     # The Epiphany single-precision floating point format does not
     # support subnormals.
diff --git a/gcc/testsuite/gcc.dg/20020312-2.c b/gcc/testsuite/gcc.dg/20020312-2.c
index f5929e0..f8be3ce 100644
--- a/gcc/testsuite/gcc.dg/20020312-2.c
+++ b/gcc/testsuite/gcc.dg/20020312-2.c
@@ -111,6 +111,11 @@ extern void abort (void);
 /* No pic register.  */
 #elif defined (__nvptx__)
 /* No pic register.  */
+#elif defined (__csky__)
+/* Pic register is r28, but some cores only have r0-r15.  */
+# if defined (__CK807__) || defined (__CK810__)
+#   define PIC_REG  "r28"
+# endif
 #else
 # error "Modify the test for your target."
 #endif
diff --git a/gcc/testsuite/gcc.dg/Wno-frame-address.c b/gcc/testsuite/gcc.dg/Wno-frame-address.c
index e6dfe52..9fe4d07 100644
--- a/gcc/testsuite/gcc.dg/Wno-frame-address.c
+++ b/gcc/testsuite/gcc.dg/Wno-frame-address.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-skip-if "Cannot access arbitrary stack frames" { arm*-*-* avr-*-* hppa*-*-* ia64-*-* visium-*-* } } */
+/* { dg-skip-if "Cannot access arbitrary stack frames" { arm*-*-* avr-*-* hppa*-*-* ia64-*-* visium-*-* csky-*-* } } */
 /* { dg-options "-Werror" } */
 /* { dg-additional-options "-mbackchain" { target { s390*-*-* } } } */
 
diff --git a/gcc/testsuite/gcc.dg/c11-true_min-1.c b/gcc/testsuite/gcc.dg/c11-true_min-1.c
index f666c72..1fbf514 100644
--- a/gcc/testsuite/gcc.dg/c11-true_min-1.c
+++ b/gcc/testsuite/gcc.dg/c11-true_min-1.c
@@ -1,6 +1,7 @@
 /* { dg-do run } */
 /* { dg-options "-std=c11" } */
 /* { dg-xfail-run-if "PR58757 -mieee is required to compare denormals" { alpha*-*-* } } */
+/* { dg-skip-if "No subnormal support" { csky-*-* } { "-mhard-float" } } */
 
 /* Test that the smallest positive value is not 0. This needs to be true
    even when denormals are not supported, so we do not pass any flag
diff --git a/gcc/testsuite/gcc.dg/sibcall-10.c b/gcc/testsuite/gcc.dg/sibcall-10.c
index d89909a..54cc604 100644
--- a/gcc/testsuite/gcc.dg/sibcall-10.c
+++ b/gcc/testsuite/gcc.dg/sibcall-10.c
@@ -5,7 +5,7 @@
    Copyright (C) 2002 Free Software Foundation Inc.
    Contributed by Hans-Peter Nilsson  <hp@bitrange.com>  */
 
-/* { dg-do run { xfail { { cris-*-* crisv32-*-* h8300-*-* hppa*64*-*-* m32r-*-* mcore-*-* mn10300-*-* msp430*-*-* nds32*-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa*-*-* } || { arm*-*-* && { ! arm32 } } } } } */
+/* { dg-do run { xfail { { cris-*-* crisv32-*-* csky-*-* h8300-*-* hppa*64*-*-* m32r-*-* mcore-*-* mn10300-*-* msp430*-*-* nds32*-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa*-*-* } || { arm*-*-* && { ! arm32 } } } } } */
 /* -mlongcall disables sibcall patterns.  */
 /* { dg-skip-if "" { powerpc*-*-* } { "-mlongcall" } { "" } } */
 /* -msave-restore disables sibcall patterns.  */
diff --git a/gcc/testsuite/gcc.dg/sibcall-9.c b/gcc/testsuite/gcc.dg/sibcall-9.c
index 8e30952..fc3bd9d 100644
--- a/gcc/testsuite/gcc.dg/sibcall-9.c
+++ b/gcc/testsuite/gcc.dg/sibcall-9.c
@@ -5,7 +5,7 @@
    Copyright (C) 2002 Free Software Foundation Inc.
    Contributed by Hans-Peter Nilsson  <hp@bitrange.com>  */
 
-/* { dg-do run { xfail { { cris-*-* crisv32-*-* h8300-*-* hppa*64*-*-* m32r-*-* mcore-*-* mn10300-*-* msp430*-*-* nds32*-*-* nvptx-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa*-*-* } || { arm*-*-* && { ! arm32 } } } } } */
+/* { dg-do run { xfail { { cris-*-* crisv32-*-* csky-*-* h8300-*-* hppa*64*-*-* m32r-*-* mcore-*-* mn10300-*-* msp430*-*-* nds32*-*-* nvptx-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa*-*-* } || { arm*-*-* && { ! arm32 } } } } } */
 /* -mlongcall disables sibcall patterns.  */
 /* { dg-skip-if "" { powerpc*-*-* } { "-mlongcall" } { "" } } */
 /* -msave-restore disables sibcall patterns.  */
diff --git a/gcc/testsuite/gcc.dg/stack-usage-1.c b/gcc/testsuite/gcc.dg/stack-usage-1.c
index 038bd4e..e644014 100644
--- a/gcc/testsuite/gcc.dg/stack-usage-1.c
+++ b/gcc/testsuite/gcc.dg/stack-usage-1.c
@@ -101,6 +101,8 @@
 #define SIZE 252
 #elif defined (__M32R__)
 #define SIZE 252
+#elif defined (__csky__)
+#  define SIZE 252
 #else
 #  define SIZE 256
 #endif
diff --git a/gcc/testsuite/gcc.dg/torture/float32-tg-3.c b/gcc/testsuite/gcc.dg/torture/float32-tg-3.c
index b07c07a..e478a23 100644
--- a/gcc/testsuite/gcc.dg/torture/float32-tg-3.c
+++ b/gcc/testsuite/gcc.dg/torture/float32-tg-3.c
@@ -4,6 +4,7 @@
 /* { dg-add-options float32 } */
 /* { dg-add-options ieee } */
 /* { dg-require-effective-target float32_runtime } */
+/* { dg-skip-if "No subnormal support" { csky-*-* } { "-mhard-float" } } */
 
 #define WIDTH 32
 #define EXT 0
diff --git a/gcc/testsuite/gcc.dg/torture/float32x-tg-3.c b/gcc/testsuite/gcc.dg/torture/float32x-tg-3.c
index 9f9f982..6f55779 100644
--- a/gcc/testsuite/gcc.dg/torture/float32x-tg-3.c
+++ b/gcc/testsuite/gcc.dg/torture/float32x-tg-3.c
@@ -4,6 +4,7 @@
 /* { dg-add-options float32x } */
 /* { dg-add-options ieee } */
 /* { dg-require-effective-target float32x_runtime } */
+/* { dg-skip-if "No subnormal support" { csky-*-* } { "-mhard-float" } } */
 
 #define WIDTH 32
 #define EXT 1
diff --git a/gcc/testsuite/gcc.dg/torture/float64-tg-3.c b/gcc/testsuite/gcc.dg/torture/float64-tg-3.c
index a83e781..a1fead7 100644
--- a/gcc/testsuite/gcc.dg/torture/float64-tg-3.c
+++ b/gcc/testsuite/gcc.dg/torture/float64-tg-3.c
@@ -4,6 +4,7 @@
 /* { dg-add-options float64 } */
 /* { dg-add-options ieee } */
 /* { dg-require-effective-target float64_runtime } */
+/* { dg-skip-if "No subnormal support" { csky-*-* } { "-mhard-float" } } */
 
 #define WIDTH 64
 #define EXT 0
diff --git a/gcc/testsuite/gcc.dg/torture/float64x-tg-3.c b/gcc/testsuite/gcc.dg/torture/float64x-tg-3.c
index 195c4fd..3cdd933 100644
--- a/gcc/testsuite/gcc.dg/torture/float64x-tg-3.c
+++ b/gcc/testsuite/gcc.dg/torture/float64x-tg-3.c
@@ -4,6 +4,7 @@
 /* { dg-add-options float64x } */
 /* { dg-add-options ieee } */
 /* { dg-require-effective-target float64x_runtime } */
+/* { dg-skip-if "No subnormal support" { csky-*-* } { "-mhard-float" } } */
 
 #define WIDTH 64
 #define EXT 1
diff --git a/gcc/testsuite/gcc.dg/torture/type-generic-1.c b/gcc/testsuite/gcc.dg/torture/type-generic-1.c
index ef32b78..a5fa8e8 100644
--- a/gcc/testsuite/gcc.dg/torture/type-generic-1.c
+++ b/gcc/testsuite/gcc.dg/torture/type-generic-1.c
@@ -3,6 +3,7 @@
 
 /* { dg-do run } */
 /* { dg-skip-if "No Inf/NaN support" { spu-*-* } } */
+/* { dg-skip-if "No subnormal support" { csky-*-* } { "-mhard-float" } } */
 /* { dg-options "-DUNSAFE" { target tic6x*-*-* visium-*-* nvptx-*-* } } */
 /* { dg-add-options ieee } */
 
diff --git a/gcc/testsuite/gcc.target/csky/and1.c b/gcc/testsuite/gcc.target/csky/and1.c
new file mode 100644
index 0000000..14ce11a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/and1.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-csky-options "-O1" } */
+
+/* Test special code generation patterns for bit operators.  */
+
+int and1 (int x)
+{
+  return x & 0xfff7ffff;
+}
+
+/* { dg-final { scan-assembler "bclri" } } */
+
diff --git a/gcc/testsuite/gcc.target/csky/and2.c b/gcc/testsuite/gcc.target/csky/and2.c
new file mode 100644
index 0000000..c661199
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/and2.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-csky-options "-O1" } */
+
+/* Test special code generation patterns for bit operators.  */
+
+int and2 (int x)
+{
+  return x & 0xfff00000;
+}
+
+/* { dg-final { scan-assembler "lsri" } } */
+/* { dg-final { scan-assembler "lsli" } } */
diff --git a/gcc/testsuite/gcc.target/csky/and3a.c b/gcc/testsuite/gcc.target/csky/and3a.c
new file mode 100644
index 0000000..3d706f6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/and3a.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-csky-options "-mcpu=ck801 -O1" } */
+
+/* Test special code generation patterns for bit operators.  */
+
+int and3 (int x)
+{
+  return x & 0x000fffff;
+}
+
+/* { dg-final { scan-assembler "lsli" } } */
+/* { dg-final { scan-assembler "lsri" } } */
diff --git a/gcc/testsuite/gcc.target/csky/and3b.c b/gcc/testsuite/gcc.target/csky/and3b.c
new file mode 100644
index 0000000..127207d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/and3b.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-csky-options "-mcpu=ck810f -O1" } */
+
+/* Test special code generation patterns for bit operators.  */
+
+int and3 (int x)
+{
+  return x & 0x000fffff;
+}
+
+/* { dg-final { scan-assembler "zext" } } */
diff --git a/gcc/testsuite/gcc.target/csky/ck801-branch.c b/gcc/testsuite/gcc.target/csky/ck801-branch.c
new file mode 100644
index 0000000..95e6962
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/ck801-branch.c
@@ -0,0 +1,40 @@
+/* { dg-do compile } */
+/* { dg-csky-options "-mcpu=ck801 -O1 -fno-reorder-blocks" } */
+
+/* Test branch generation on CK801, which cannot rely on assembler
+   branch relaxation because long branches clobber lr.  */
+
+#define nop8 asm ("nop\nnop\nnop\nnop\nnop\nnop\nnop\nnop")
+#define nop64 nop8; nop8; nop8; nop8; nop8; nop8; nop8; nop8
+#define nop512 nop64; nop64; nop64; nop64; nop64; nop64; nop64; nop64
+#define nop4k nop512; nop512; nop512; nop512; nop512; nop512; nop512; nop512
+#define nop32k nop4k; nop4k; nop4k; nop4k; nop4k; nop4k; nop4k; nop4k
+
+extern void g (int);
+int f (int x, int y, int z)
+{
+  if (x == 0)		// cmpnei; jbt
+    {
+      nop64;
+      x = y;
+    }
+  if (y == 0)		// cmpnei; jbf; jbr
+    {
+      nop512;
+      y = z;
+    }
+  if (z == 0)		// cmpnei; jbf; bsr
+    {
+      nop32k;
+      z = x;
+    }
+  return x + y + z;
+}
+
+/* { dg-final { scan-assembler "push.*lr" } } */
+/* { dg-final { scan-assembler "pop.*lr" } } */
+/* { dg-final { scan-assembler-times "cmpnei" 3 } } */
+/* { dg-final { scan-assembler-times "jbt" 1 } } */
+/* { dg-final { scan-assembler-times "jbf" 2 } } */
+/* { dg-final { scan-assembler-times "jbr" 1 } } */
+/* { dg-final { scan-assembler-times "bsr" 1 } } */
diff --git a/gcc/testsuite/gcc.target/csky/constpool-1.c b/gcc/testsuite/gcc.target/csky/constpool-1.c
new file mode 100644
index 0000000..5c7cfdc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/constpool-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-csky-options "-mcpu=ck801 -O1" } */
+
+/* Make sure that constant pools are emitted by the compiler for ck801.
+   If this is deferred to the assembler, the compiler will compute
+   incorrect branch offsets.  */
+
+void f (unsigned int *u, long long int *l, float *f, double *d)
+{
+  *u = 0xdeadbeef;
+  *l = 0xcafef00dc0ffeeULL;
+  *f = 3.14159F;
+  *d = 2.718281828459;
+}
+
+/* { dg-final { scan-assembler-times "\\.long" 6 } } */
diff --git a/gcc/testsuite/gcc.target/csky/constpool-2.c b/gcc/testsuite/gcc.target/csky/constpool-2.c
new file mode 100644
index 0000000..d654420
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/constpool-2.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-csky-options "-mcpu=ck810f -O1 -mconstpool" } */
+
+/* Make sure that constant pools are emitted by the compiler when
+   -mconstpool is provided.  */
+
+void f (unsigned int *u, long long int *l, float *f, double *d)
+{
+  *u = 0xdeadbeef;
+  *l = 0xcafef00dc0ffeeULL;
+  *f = 3.14159F;
+  *d = 2.718281828459;
+}
+
+/* { dg-final { scan-assembler-times "\\.long" 6 } } */
diff --git a/gcc/testsuite/gcc.target/csky/constpool-3.c b/gcc/testsuite/gcc.target/csky/constpool-3.c
new file mode 100644
index 0000000..e3a6e09
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/constpool-3.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-csky-options "-mcpu=ck810f -O1 -mno-constpool" } */
+
+/* Make sure that constant pools are not emitted by the compiler when
+   -mno-constpool is provided.  */
+
+void f (unsigned int *u, long long int *l, float *f, double *d)
+{
+  *u = 0xdeadbeef;
+  *l = 0xcafef00dc0ffeeULL;
+  *f = 3.14159F;
+  *d = 2.718281828459;
+}
+
+/* { dg-final { scan-assembler-not "\\.long" } } */
diff --git a/gcc/testsuite/gcc.target/csky/cse-cc.c b/gcc/testsuite/gcc.target/csky/cse-cc.c
new file mode 100644
index 0000000..acf63b8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/cse-cc.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-csky-options "-O2" } */
+
+/* Test that the two comparisons are combined.  This is supposed to be
+   handled by the cse_cc pass when conditional execution instructions
+   are generated (non-CK801) or generic code otherwise (CK801).  */
+
+int e1, e2;
+
+void func (int a, int b, int c, int d, int f, int g)
+{
+  e1 = a > b ? f : g;
+  e2 = a > b ? c : d;
+
+  return;
+}
+
+/* { dg-final { scan-assembler-times "cmp" 1 } } */
+
diff --git a/gcc/testsuite/gcc.target/csky/csky.exp b/gcc/testsuite/gcc.target/csky/csky.exp
new file mode 100644
index 0000000..9569490
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/csky.exp
@@ -0,0 +1,79 @@
+# GCC testsuite for C-SKY targets.
+# Copyright (C) 2012-2018 Free Software Foundation, Inc.
+# Contributed by C-SKY Microsystems and Mentor Graphics.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+# 
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# Exit immediately if this isn't a C-SKY target.
+if ![istarget csky*-*-*] then {
+  return
+}
+
+# Load support procs.
+load_lib gcc-dg.exp
+
+# Like dg-options, but treats certain C-SKY-specific options specially:
+#
+#    -mcpu=*
+#	Select the target cpu. Skip the test if the multilib flags force
+#	a different cpu.
+proc dg-csky-options {args} {
+    upvar dg-extra-tool-flags extra_tool_flags
+    upvar dg-do-what do_what
+
+    set multilib_cpu ""
+    set multilib_hf ""
+    set cpu ""
+
+    foreach flag [target_info multilib_flags] {
+	regexp "^-mcpu=(.*)" $flag dummy multilib_cpu
+        regexp "^-mhard-float" $flag multilib_hf
+    }
+
+    set flags [lindex $args 1]
+
+    foreach flag $flags {
+	regexp "^-mcpu=(.*)" $flag dummy cpu
+    }
+
+    if {$cpu == ""} then {
+      set extra_tool_flags $flags
+    } elseif {$multilib_cpu == "" || $multilib_cpu == $cpu} then {
+        if { ($cpu == "ck801" || $cpu == "ck802") 
+	     && $multilib_hf != "" } then {
+	    set do_what [list [lindex $do_what 0] "N" "P"]
+	} else {
+	    set extra_tool_flags $flags
+	}
+    } else {
+	set do_what [list [lindex $do_what 0] "N" "P"]
+    }
+}
+
+# If a testcase doesn't have special options, use these.
+global DEFAULT_CFLAGS
+if ![info exists DEFAULT_CFLAGS] then {
+    set DEFAULT_CFLAGS " -ansi -pedantic-errors"
+}
+
+# Initialize `dg'.
+dg-init
+
+# Main loop.
+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cCS\]]] \
+	"" $DEFAULT_CFLAGS
+
+# All done.
+dg-finish
diff --git a/gcc/testsuite/gcc.target/csky/fnargs-1.c b/gcc/testsuite/gcc.target/csky/fnargs-1.c
new file mode 100644
index 0000000..5cc85b6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/fnargs-1.c
@@ -0,0 +1,38 @@
+/* { dg-do run } */
+
+/* Check that a structure argument passed partially in registers and
+   partially on the stack works.  */
+
+#include <stdlib.h>
+#include <string.h>
+
+struct s {
+  unsigned int i;
+  double d;
+  char s[16];
+};
+
+/* Note specifically that, since there are 4 argument registers, the
+   value of ss.d is split between the last argument register and the
+   stack.  */
+void
+f (struct s *sp, int j, struct s ss, int k)
+{
+  if (sp->i != ss.i
+      || sp->d != ss.d
+      || strcmp (sp->s, ss.s))
+    abort ();
+  if (j != -k)
+    abort ();
+}
+
+int
+main (void)
+{
+  struct s ss;
+  ss.i = 0xdeadbeef;
+  ss.d = 2.71828;
+  strcpy (ss.s, "shazam!");
+  f (&ss, 42, ss, -42);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/csky/fnargs-2.c b/gcc/testsuite/gcc.target/csky/fnargs-2.c
new file mode 100644
index 0000000..d4e1b71
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/fnargs-2.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+
+/* Check that varargs passed partially in registers and
+   partially on the stack works.  */
+
+#include <stdlib.h>
+#include <string.h>
+#include <stdarg.h>
+
+struct s {
+  unsigned int i;
+  double d;
+  char s[16];
+};
+
+/* Note specifically that, as there are 4 argument registers,
+   the value of ss.d is split between the last argument register
+   and the stack.  */
+void
+f (struct s *sp, ...)
+{
+  int j, k;
+  unsigned int i;
+  double d;
+  char *s;
+  va_list ap;
+  va_start (ap, sp);
+  j = va_arg (ap, int);
+  i = va_arg (ap, unsigned int);
+  d = va_arg (ap, double);
+  s = va_arg (ap, char *);
+  k = va_arg (ap, int);
+  va_end (ap);
+
+  if (sp->i != i
+      || sp->d != d
+      || strcmp (sp->s, s))
+    abort ();
+  if (j != -k)
+    abort ();
+}
+
+int
+main (void)
+{
+  struct s ss;
+  ss.i = 0xdeadbeef;
+  ss.d = 2.71828;
+  strcpy (ss.s, "shazam!");
+  f (&ss, 42, ss.i, ss.d, ss.s, -42);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/csky/fnargs-3.c b/gcc/testsuite/gcc.target/csky/fnargs-3.c
new file mode 100644
index 0000000..8cf3e5c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/fnargs-3.c
@@ -0,0 +1,31 @@
+/* { dg-do run } */
+
+/* Check that sub-word sized elements of structures passed in in
+   registers are handled correctly with respect to the current endianness.  */
+
+#include <stdlib.h>
+#include <string.h>
+
+struct s {
+  short h;
+  char s[8];
+};
+
+void
+f (struct s *sp, struct s ss)
+{
+  if (sp->h != ss.h
+      || strcmp (sp->s, ss.s))
+    abort ();
+}
+
+int
+main (void)
+{
+  struct s ss;
+  ss.h = 42;
+  strcpy (ss.s, "shazam!");
+  f (&ss, ss);
+  return 0;
+}
+
diff --git a/gcc/testsuite/gcc.target/csky/land1.c b/gcc/testsuite/gcc.target/csky/land1.c
new file mode 100644
index 0000000..e5ca51c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/land1.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-csky-options "-O1" } */
+
+/* Test special code generation patterns for bit operators.  */
+
+long long int land1 (long long int x)
+{
+  return x & 0xffffffff00000000LL;
+}
+
+/* { dg-final { scan-assembler "movi.*, 0" } } */
diff --git a/gcc/testsuite/gcc.target/csky/land2.c b/gcc/testsuite/gcc.target/csky/land2.c
new file mode 100644
index 0000000..b45e7b6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/land2.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-csky-options "-O1" } */
+
+/* Test special code generation patterns for bit operators.  */
+
+long long int land2 (long long int x)
+{
+  return x & 0x00000000ffffffffLL;
+}
+
+/* { dg-final { scan-assembler "movi.*, 0" } } */
diff --git a/gcc/testsuite/gcc.target/csky/naked.c b/gcc/testsuite/gcc.target/csky/naked.c
new file mode 100644
index 0000000..f81984c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/naked.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-final { scan-assembler-not "push" } } */
+/* { dg-final { scan-assembler-not "pop" } } */
+
+/* Check that there is no prologue/epilogue code emitted for a function
+   with the naked attribute.  Without the attribute, this function would
+   push/pop lr.  */
+
+extern void g (int);
+
+int __attribute__((naked))
+f (int x)
+{
+  g (x);
+  return 42;
+}
diff --git a/gcc/testsuite/gcc.target/csky/or1.c b/gcc/testsuite/gcc.target/csky/or1.c
new file mode 100644
index 0000000..24918bc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/or1.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-csky-options "-O1" } */
+
+/* Test special code generation patterns for bit operators.  */
+
+int or1 (int x)
+{
+  return x | 0x00100000;
+}
+
+/* { dg-final { scan-assembler "bseti" } } */
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 99613fd..7e81936 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -669,6 +669,7 @@ proc check_profiling_available { test_what } {
 	     || [istarget bfin-*-*]
 	     || [istarget cris-*-*]
 	     || [istarget crisv32-*-*]
+	     || [istarget csky-*-elf]
 	     || [istarget fido-*-elf]
 	     || [istarget h8300-*-*]
 	     || [istarget lm32-*-*]
@@ -1228,6 +1229,16 @@ proc check_effective_target_hard_float { } {
 	# }]
     }
 
+    # The generic test doesn't work for C-SKY because some cores have
+    # hard float for single precision only.
+    if { [istarget csky*-*-*] } {
+       return [check_no_compiler_messages hard_float assembly {
+               #if defined __csky_soft_float__
+               #error __csky_soft_float__
+               #endif
+       }]
+    }
+
     # The generic test equates hard_float with "no call for adding doubles".
     return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
 	double a (double b, double c) { return b + c; }
@@ -8804,6 +8815,7 @@ proc check_effective_target_logical_op_short_circuit {} {
 	 || [istarget arc*-*-*]
 	 || [istarget avr*-*-*]
 	 || [istarget crisv32-*-*] || [istarget cris-*-*]
+	 || [istarget csky*-*-*]
 	 || [istarget mmix-*-*]
 	 || [istarget s390*-*-*]
 	 || [istarget powerpc*-*-*]
@@ -8822,6 +8834,7 @@ proc check_effective_target_logical_op_short_circuit {} {
 proc check_effective_target_branch_cost {} {
     if { [   istarget arm*-*-*]
 	 || [istarget avr*-*-*]
+	 || [istarget csky*-*-*]
 	 || [istarget epiphany*-*-*]
 	 || [istarget frv*-*-*]
 	 || [istarget i?86-*-*] || [istarget x86_64-*-*]

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