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Re: [Patch-86512]: Subnormal float support in armv7(with -msoft-float) for intrinsics


On Fri, 27 Jul 2018, Wilco Dijkstra wrote:

> Hi Nicolas,
> 
> I think your patch doesn't quite work as expected:
> 
> @@ -238,9 +238,10 @@ LSYM(Lad_a):
>  	movs	ip, ip, lsl #1
>  	adcs	xl, xl, xl
>  	adc	xh, xh, xh
> -	tst	xh, #0x00100000
> -	sub	r4, r4, #1
> -	bne	LSYM(Lad_e)
> +	subs	r4, r4, #1
> +	do_it	hs
> +	tsths	xh, #0x00100000
> +	bhi	LSYM(Lad_e)
> 
> If the exponent in r4 is zero, the carry bit will be clear, so we don't execute the tsths
> and fallthrough (the denormal will be normalized and then denormalized again, but
> that's so rare it doesn't matter really).

And that's what is intended.

> However if r4 is non-zero, the carry will be set, and the tsths will be executed. This
> clears the carry and sets the Z flag based on bit 20.

No, not at all. The carry is not affected. And that's the point of the 
tst instruction here rather than a cmp: it sets the N and Z flags but 
leaves C alone as there is no shifter involved.


Nicolas


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