This is the mail archive of the
mailing list for the GCC project.
Re: RFC: Patch to implement Aarch64 SIMD ABI
On Fri, 2018-07-20 at 11:11 +0000, Wilco Dijkstra wrote:
> Steve Ellcey wrote:
> > Yes, I see where I missed this in aarch64_push_regs
> > and aarch64_pop_regs. I think that is why the second of
> > Wilco's two examples (f2) is wrong. I am unclear about
> > exactly what is meant by writeback and why we have it and
> > how that and callee_adjust are used. Any chance someone
> > could help me understand this part of the prologue/epilogue
> > code better? The comments in aarch64.c/aarch64.h aren't
> > really helping me understand what the code is doing or
> > why it is doing it.
> Writeback is the same as a base update in a load or store. When
> creating the frame there are 3 stack adjustments to be made:
> creating stack for locals, pushing callee-saves and reserving space
> for outgoing arguments. We merge these stack adjustments as much as
> possible and use load/store with writeback for codesize and performance.
> See the last part in layout_frame for the different cases.
OK, I think I understand this a bit better now. I think my main
problem is with the term 'writeback' which I am not used to seeing.
But if I understand things correctly we are saving one or two registers
and (possibly) updating the stack pointer using auto-increment/auto-
decrement in one instruction and that the updating of SP is what you
mean by 'writeback'. Correct?