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Re: [PATCH 2/6] [ARC] Allow EX instruction for ARC700 and ARCv2.
- From: Andrew Burgess <andrew dot burgess at embecosm dot com>
- To: Claudiu Zissulescu <claziss at gmail dot com>
- Cc: gcc-patches at gcc dot gnu dot org, fbedard at synopsys dot com, claziss at synopsys dot comq, claziss <claziss at synopsys dot com>
- Date: Tue, 12 Jun 2018 20:31:43 +0100
- Subject: Re: [PATCH 2/6] [ARC] Allow EX instruction for ARC700 and ARCv2.
- References: <20180521101839.13288-1-claziss@gmail.com> <20180521101839.13288-2-claziss@gmail.com>
* Claudiu Zissulescu <claziss@gmail.com> [2018-05-21 13:18:35 +0300]:
> From: claziss <claziss@synopsys.com>
>
> The EX instruction is base line for both architectures. Reflect this in the compiler.
>
> OK to apply?
Looks good.
Thanks,
Andrew
> Claudiu
>
> gcc/
> 2017-05-02 Claudiu Zissulescu <claziss@synopsys.com>
>
> * config/arc/arc.c (atomic_exchangesi): EX instruction is default
> for ARC700 and ARCv2.
> ---
> gcc/config/arc/atomic.md | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/gcc/config/arc/atomic.md b/gcc/config/arc/atomic.md
> index 13a2e34549c..4a56ca229cc 100644
> --- a/gcc/config/arc/atomic.md
> +++ b/gcc/config/arc/atomic.md
> @@ -120,7 +120,7 @@
> (match_operand:SI 1 "mem_noofs_operand" "")
> (match_operand:SI 2 "register_operand" "")
> (match_operand:SI 3 "const_int_operand" "")]
> - "TARGET_ATOMIC"
> + "TARGET_ARC700 || TARGET_V2"
> {
> enum memmodel model = (enum memmodel) INTVAL (operands[3]);
>
> --
> 2.14.3
>