[AArch64][PATCH 1/2] Fix addressing printing of LDP/STP

[Andre Simoes Dias Vieira <Andre dot SimoesDiasVieira at arm dot com>]

Hi,

The address printing for LDP/STP patterns that don't use parallel was not working properly when dealing with a post-index addressing mode. The post-index address printing uses the mode's size to determine the post-index immediate.  To fix an earlier issue with range checking of these instructions this mode was being hard-coded to DFmode for the operand modifier 'y', which was added for this particular pattern.  This was done because the range of LDP/STP for two 64-bit operands is the same as a single 64-bit load/store. Instead of hard-coding the mode early on we introduce a new address query type 'ADDR_QUERY_LDP_STP_N' to be used for such cases. This will halve the mode used for computing the range check, but leave the original mode of the operand as is, making sure the post-index printing is correct.

Bootstrapped and tested on aarch64-none-linux-gnu.

Is this OK for trunk?

gcc
2018-06-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>

        * config/aarch64/aarch64-protos.h (aarch64_addr_query_type): Add new
        enum value 'ADDR_QUERY_LDP_STP_N'.
        * config/aarch64/aarch64.c (aarch64_addr_query_type): Likewise.
        (aarch64_print_address_internal): Add declaration.
        (aarch64_print_ldpstp_address): Remove.
        (aarch64_classify_address): Adapt mode for 'ADDR_QUERY_LDP_STP_N'.
        (aarch64_print_operand): Change printing of 'y'.
        * config/aarch64/predicates.md (aarch64_mem_pair_lanes_operand): Use
        new enum value 'ADDR_QUERY_LDP_STP_N', don't hardcode mode and use
        'true' rather than '1'.
        * gcc/config/aarch64/constraints.md (Uml): Likewise.

Attachment: stp-1.patch
Description: stp-1.patch