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patch for PR82444


  The following patch fixes ICE for

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82444

  The patch was successfully bootstrapped on x86_64.

  Committed as rev. 257254.

Index: ChangeLog
===================================================================
--- ChangeLog	(revision 257252)
+++ ChangeLog	(working copy)
@@ -1,3 +1,8 @@
+2018-01-31  Vladimir Makarov  <vmakarov@redhat.com>
+
+	PR target/82444
+	* ira.c (ira_init_register_move_cost): Remove assert.
+
 2018-01-31  Eric Botcazou  <ebotcazou@adacore.com>
 
 	PR rtl-optimization/84071
Index: testsuite/ChangeLog
===================================================================
--- testsuite/ChangeLog	(revision 257252)
+++ testsuite/ChangeLog	(working copy)
@@ -1,3 +1,8 @@
+2018-01-31  Vladimir Makarov  <vmakarov@redhat.com>
+
+	PR target/82444
+	* gcc.target/i386/pr82444.c: New.
+
 2018-01-31  Paolo Carlini  <paolo.carlini@oracle.com>
 
 	PR c++/84092
Index: ira.c
===================================================================
--- ira.c	(revision 257157)
+++ ira.c	(working copy)
@@ -1578,7 +1578,8 @@ ira_init_register_move_cost (machine_mod
   ira_assert (ira_register_move_cost[mode] == NULL
 	      && ira_may_move_in_cost[mode] == NULL
 	      && ira_may_move_out_cost[mode] == NULL);
-  ira_assert (have_regs_of_mode[mode]);
+  /* have_regs_of_mode[mode] might be false because it might be
+     E_<mode> (see genmodes) of pseudo with <mode>.  */
   for (cl1 = 0; cl1 < N_REG_CLASSES; cl1++)
     for (cl2 = 0; cl2 < N_REG_CLASSES; cl2++)
       {
Index: testsuite/gcc.target/i386/pr82444.c
===================================================================
--- testsuite/gcc.target/i386/pr82444.c	(nonexistent)
+++ testsuite/gcc.target/i386/pr82444.c	(working copy)
@@ -0,0 +1,5 @@
+/* { dg-do compile { target { ia32 } } } */
+/* { dg-options "-march=athlon" } */
+
+__float128 a;
+void b () { __asm__("" : "+r"(a)); } /* { dg-error "inconsistent operand constraints in an" } */

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