This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: [PATCH][GCC][AArch64] Enable dotproduct by default for Armv8.4-a
- From: James Greenhalgh <james dot greenhalgh at arm dot com>
- To: Tamar Christina <Tamar dot Christina at arm dot com>
- Cc: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>, nd <nd at arm dot com>, Richard Earnshaw <Richard dot Earnshaw at arm dot com>, Marcus Shawcroft <Marcus dot Shawcroft at arm dot com>
- Date: Tue, 9 Jan 2018 18:03:36 +0000
- Subject: Re: [PATCH][GCC][AArch64] Enable dotproduct by default for Armv8.4-a
- Authentication-results: sourceware.org; auth=none
- Authentication-results: spf=pass (sender IP is 217.140.96.140) smtp.mailfrom=arm.com; gcc.gnu.org; dkim=none (message not signed) header.d=none;gcc.gnu.org; dmarc=bestguesspass action=none header.from=arm.com;
- Nodisclaimer: True
- References: <20180109103620.GA6704@arm.com>
- Spamdiagnosticmetadata: NSPM
- Spamdiagnosticoutput: 1:99
On Tue, Jan 09, 2018 at 10:36:23AM +0000, Tamar Christina wrote:
> Hi All,
>
> This patch makes the Dot Product extension mandatory on Armv8.4-A.
>
> Regtested on aarch64-none-elf and no regressions.
OK.
Thanks,
James
> gcc/
> 2018-01-09 Tamar Christina <tamar.christina@arm.com>
>
> * config/aarch64/aarch64.h
> (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
>
> gcc/testsuite/
> 2018-01-09 Tamar Christina <tamar.christina@arm.com>
>
> * gcc.target/aarch64/advsimd-intrinsics/vdot-compile-2.c: New.
>
> Ok for trunk?
>
> Thanks,
> Tamar
>
> --
> diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
> index 20cef53079c955733db105331b7f1bd3bdb03005..02546e278ed860f0e42fa1423ceb39f1d4cb5e9b 100644
> --- a/gcc/config/aarch64/aarch64.h
> +++ b/gcc/config/aarch64/aarch64.h
> @@ -171,7 +171,7 @@ extern unsigned aarch64_architecture_version;
> #define AARCH64_FL_FOR_ARCH8_3 \
> (AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_V8_3)
> #define AARCH64_FL_FOR_ARCH8_4 \
> - (AARCH64_FL_FOR_ARCH8_3 | AARCH64_FL_V8_4)
> + (AARCH64_FL_FOR_ARCH8_3 | AARCH64_FL_V8_4 | AARCH64_FL_DOTPROD)
>
> /* Macros to test ISA flags. */
>
> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-compile-2.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-compile-2.c
> new file mode 100644
> index 0000000000000000000000000000000000000000..7d8d641bcf0f4cc31b9df51b0c0c499bc8dedfce
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-compile-2.c
> @@ -0,0 +1,73 @@
> +/* { dg-do compile { target { aarch64*-*-* } } } */
> +/* { dg-additional-options "-O3 -march=armv8.4-a" } */
> +
> +#include <arm_neon.h>
> +
> +/* Unsigned Dot Product instructions. */
> +
> +uint32x2_t ufoo (uint32x2_t r, uint8x8_t x, uint8x8_t y)
> +{
> + return vdot_u32 (r, x, y);
> +}
> +
> +uint32x4_t ufooq (uint32x4_t r, uint8x16_t x, uint8x16_t y)
> +{
> + return vdotq_u32 (r, x, y);
> +}
> +
> +uint32x2_t ufoo_lane (uint32x2_t r, uint8x8_t x, uint8x8_t y)
> +{
> + return vdot_lane_u32 (r, x, y, 0);
> +}
> +
> +uint32x2_t ufoo_laneq (uint32x2_t r, uint8x8_t x, uint8x16_t y)
> +{
> + return vdot_laneq_u32 (r, x, y, 0);
> +}
> +
> +uint32x4_t ufooq_lane (uint32x4_t r, uint8x16_t x, uint8x8_t y)
> +{
> + return vdotq_lane_u32 (r, x, y, 0);
> +}
> +
> +uint32x4_t ufooq_laneq (uint32x4_t r, uint8x16_t x, uint8x16_t y)
> +{
> + return vdotq_laneq_u32 (r, x, y, 0);
> +}
> +
> +/* Signed Dot Product instructions. */
> +
> +int32x2_t sfoo (int32x2_t r, int8x8_t x, int8x8_t y)
> +{
> + return vdot_s32 (r, x, y);
> +}
> +
> +int32x4_t sfooq (int32x4_t r, int8x16_t x, int8x16_t y)
> +{
> + return vdotq_s32 (r, x, y);
> +}
> +
> +int32x2_t sfoo_lane (int32x2_t r, int8x8_t x, int8x8_t y)
> +{
> + return vdot_lane_s32 (r, x, y, 0);
> +}
> +
> +int32x2_t sfoo_laneq (int32x2_t r, int8x8_t x, int8x16_t y)
> +{
> + return vdot_laneq_s32 (r, x, y, 0);
> +}
> +
> +int32x4_t sfooq_lane (int32x4_t r, int8x16_t x, int8x8_t y)
> +{
> + return vdotq_lane_s32 (r, x, y, 0);
> +}
> +
> +int32x4_t sfooq_laneq (int32x4_t r, int8x16_t x, int8x16_t y)
> +{
> + return vdotq_laneq_s32 (r, x, y, 0);
> +}
> +
> +/* { dg-final { scan-assembler-times {[us]dot\tv[0-9]+\.2s, v[0-9]+\.8b, v[0-9]+\.8b} 2 } } */
> +/* { dg-final { scan-assembler-times {[us]dot\tv[0-9]+\.2s, v[0-9]+\.8b, v[0-9]+\.4b\[[0-9]+\]} 4 } } */
> +/* { dg-final { scan-assembler-times {[us]dot\tv[0-9]+\.4s, v[0-9]+\.16b, v[0-9]+\.16b} 2 } } */
> +/* { dg-final { scan-assembler-times {[us]dot\tv[0-9]+\.4s, v[0-9]+\.16b, v[0-9]+\.4b\[[0-9]+\]} 4 } } */
>