[PATCH, gcc-7] Fix RISCV ICE on linux kernel build.

[Jim Wilson <jimw at sifive dot com>]

This fixes an ICE that occurs during a linux kernel build with gcc-7-branch
by backporting a patch from mainline.  The problem occurs when using -fpic,
as we have patterns with a clobber for loading/storing from/to an address
using a symbol.  During optimization, it is possible for optimizations to
generate new instructions via emit_move_insn that are missing the clobber
and thus fail to match.  We fix the problem by legitimizing these addresses,
by forcing the symbol into a register.  A later optimization pass then cleans
this up and generates the pattern with the clobber again.

The riscv target was just added to the mainline linux kernel a week or so ago,
and we are getting interest from multiple distro vendors on building a riscv
linux distro, so we would like to have all necessary patches for a linux build
in the next gcc-7.x release.  This is the first one.

I'm assuming I can self-approve this as riscv maintainer for the gcc-7 branch,
as this is a riscv specific patch.  This was tested with a linux kernel build,
and a gcc testsuite run.  There were no regressions.

Committed.

	gcc/
	Backport from mainline
	2017-11-03  Kito Cheng  <kito.cheng@gmail.com>

	* config/riscv/riscv.c (riscv_legitimize_move): Handle
	non-legitimate address.
---
 gcc/config/riscv/riscv.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c
index d5928c3..6cb7113 100644
--- a/gcc/config/riscv/riscv.c
+++ b/gcc/config/riscv/riscv.c
@@ -1377,6 +1377,22 @@ riscv_legitimize_move (enum machine_mode mode, rtx dest, rtx src)
       return true;
     }
 
+  /* RISC-V GCC may generate non-legitimate address due to we provide some
+     pattern for optimize access PIC local symbol and it's make GCC generate
+     unrecognizable instruction during optmizing.  */
+
+  if (MEM_P (dest) && !riscv_legitimate_address_p (mode, XEXP (dest, 0),
+						   reload_completed))
+    {
+      XEXP (dest, 0) = riscv_force_address (XEXP (dest, 0), mode);
+    }
+
+  if (MEM_P (src) && !riscv_legitimate_address_p (mode, XEXP (src, 0),
+						  reload_completed))
+    {
+      XEXP (src, 0) = riscv_force_address (XEXP (src, 0), mode);
+    }
+
   return false;
 }
 
-- 
2.7.4