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[PATCH 7/8] S/390: Fix vector fp unordered compares
- From: Andreas Krebbel <krebbel at linux dot vnet dot ibm dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Tue, 26 Sep 2017 12:37:50 +0200
- Subject: [PATCH 7/8] S/390: Fix vector fp unordered compares
- Authentication-results: sourceware.org; auth=none
- References: <20170926103751.21907-1-krebbel@linux.vnet.ibm.com>
V2DF mode was still hard-coded here.
gcc/ChangeLog:
2017-09-26 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.c (s390_expand_vec_compare): Use the new mode
independent expanders.
* config/s390/vector.md ("vec_cmpuneq", "vec_cmpltgt")
("vec_ordered", "vec_unordered"): New expanders.
---
gcc/ChangeLog | 7 ++++++
gcc/config/s390/s390.c | 8 +++---
gcc/config/s390/vector.md | 64 +++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 75 insertions(+), 4 deletions(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a33de8f..d4f67f5 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,12 @@
2017-09-26 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+ * config/s390/s390.c (s390_expand_vec_compare): Use the new mode
+ independent expanders.
+ * config/s390/vector.md ("vec_cmpuneq", "vec_cmpltgt")
+ ("vec_ordered", "vec_unordered"): New expanders.
+
+2017-09-26 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
* config/s390/s390.c (s390_preferred_simd_mode): Return V4SFmode
for SFmode.
diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index 0ceeef4..d2671ba 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -6396,16 +6396,16 @@ s390_expand_vec_compare (rtx target, enum rtx_code cond,
/* UNLT: a u< b -> !(a >= b) */
case UNLT: cond = GE; neg_p = true; break;
case UNEQ:
- emit_insn (gen_vec_cmpuneqv2df (target, cmp_op1, cmp_op2));
+ emit_insn (gen_vec_cmpuneq (target, cmp_op1, cmp_op2));
return;
case LTGT:
- emit_insn (gen_vec_cmpltgtv2df (target, cmp_op1, cmp_op2));
+ emit_insn (gen_vec_cmpltgt (target, cmp_op1, cmp_op2));
return;
case ORDERED:
- emit_insn (gen_vec_orderedv2df (target, cmp_op1, cmp_op2));
+ emit_insn (gen_vec_ordered (target, cmp_op1, cmp_op2));
return;
case UNORDERED:
- emit_insn (gen_vec_unorderedv2df (target, cmp_op1, cmp_op2));
+ emit_insn (gen_vec_unordered (target, cmp_op1, cmp_op2));
return;
default: break;
}
diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md
index 06c88c1..d40bf1e 100644
--- a/gcc/config/s390/vector.md
+++ b/gcc/config/s390/vector.md
@@ -1406,6 +1406,22 @@
operands[3] = gen_reg_rtx (<tointvec>mode);
})
+(define_expand "vec_cmpuneq"
+ [(match_operand 0 "register_operand" "")
+ (match_operand 1 "register_operand" "")
+ (match_operand 2 "register_operand" "")]
+ "TARGET_VX"
+{
+ if (GET_MODE (operands[1]) == V4SFmode)
+ emit_insn (gen_vec_cmpuneqv4sf (operands[0], operands[1], operands[2]));
+ else if (GET_MODE (operands[1]) == V2DFmode)
+ emit_insn (gen_vec_cmpuneqv2df (operands[0], operands[1], operands[2]));
+ else
+ gcc_unreachable ();
+
+ DONE;
+})
+
; LTGT a <> b -> a > b | b > a
(define_expand "vec_cmpltgt<mode>"
[(set (match_operand:<tointvec> 0 "register_operand" "=v")
@@ -1418,6 +1434,22 @@
operands[3] = gen_reg_rtx (<tointvec>mode);
})
+(define_expand "vec_cmpltgt"
+ [(match_operand 0 "register_operand" "")
+ (match_operand 1 "register_operand" "")
+ (match_operand 2 "register_operand" "")]
+ "TARGET_VX"
+{
+ if (GET_MODE (operands[1]) == V4SFmode)
+ emit_insn (gen_vec_cmpltgtv4sf (operands[0], operands[1], operands[2]));
+ else if (GET_MODE (operands[1]) == V2DFmode)
+ emit_insn (gen_vec_cmpltgtv2df (operands[0], operands[1], operands[2]));
+ else
+ gcc_unreachable ();
+
+ DONE;
+})
+
; ORDERED (a, b): a >= b | b > a
(define_expand "vec_ordered<mode>"
[(set (match_operand:<tointvec> 0 "register_operand" "=v")
@@ -1430,6 +1462,22 @@
operands[3] = gen_reg_rtx (<tointvec>mode);
})
+(define_expand "vec_ordered"
+ [(match_operand 0 "register_operand" "")
+ (match_operand 1 "register_operand" "")
+ (match_operand 2 "register_operand" "")]
+ "TARGET_VX"
+{
+ if (GET_MODE (operands[1]) == V4SFmode)
+ emit_insn (gen_vec_orderedv4sf (operands[0], operands[1], operands[2]));
+ else if (GET_MODE (operands[1]) == V2DFmode)
+ emit_insn (gen_vec_orderedv2df (operands[0], operands[1], operands[2]));
+ else
+ gcc_unreachable ();
+
+ DONE;
+})
+
; UNORDERED (a, b): !ORDERED (a, b)
(define_expand "vec_unordered<mode>"
[(set (match_operand:<tointvec> 0 "register_operand" "=v")
@@ -1443,6 +1491,22 @@
operands[3] = gen_reg_rtx (<tointvec>mode);
})
+(define_expand "vec_unordered"
+ [(match_operand 0 "register_operand" "")
+ (match_operand 1 "register_operand" "")
+ (match_operand 2 "register_operand" "")]
+ "TARGET_VX"
+{
+ if (GET_MODE (operands[1]) == V4SFmode)
+ emit_insn (gen_vec_unorderedv4sf (operands[0], operands[1], operands[2]));
+ else if (GET_MODE (operands[1]) == V2DFmode)
+ emit_insn (gen_vec_unorderedv2df (operands[0], operands[1], operands[2]));
+ else
+ gcc_unreachable ();
+
+ DONE;
+})
+
(define_insn "*vec_load_pair<mode>"
[(set (match_operand:V_HW_64 0 "register_operand" "=v,v")
(vec_concat:V_HW_64 (match_operand:<non_vec> 1 "register_operand" "d,v")
--
2.9.1