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When I added the optimization for loading 32-bit values directly into the vector registers from memory to convert to IEEE 128-bit floating point, I forgot to make sure the address did not have PRE_INCREMENT, etc. addressing. I checked the compiler on a little endian power8 system. Is it ok to check this patch into the trunk and back port it GCC 7? GCC 6 did not have the optimization. [gcc] 2017-08-28 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/81959 * config/rs6000/rs6000.md (float_<mode>si2_hw): If register allocation hasn't been done, make sure the memory address is X-FORM (register+register). (floatuns_<mode>si2_hw2): Likewise. [gcct/testsuite] 2017-08-28 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/81959 * gcc.target/powerpc/pr81959.c: New test. -- Michael Meissner, IBM IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA email: meissner@linux.vnet.ibm.com, phone: +1 (978) 899-4797
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