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Re: RFC: Explicit move preference hints
- From: Wilco Dijkstra <Wilco dot Dijkstra at arm dot com>
- To: Segher Boessenkool <segher at kernel dot crashing dot org>
- Cc: GCC Patches <gcc-patches at gcc dot gnu dot org>, Vladimir Makarov <vmakarov at redhat dot com>, nd <nd at arm dot com>
- Date: Wed, 23 Aug 2017 17:15:03 +0000
- Subject: Re: RFC: Explicit move preference hints
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Segher Boessenkool wrote:
> On Tue, Aug 22, 2017 at 10:48:17AM +0000, Wilco Dijkstra wrote:
> > The register allocator inserts move preferences when an instruction has
> > one or more dead sources in add_insn_allocno_copies. If an instruction
> > doesn't have a matching constraint (eg. "0"), then any dead source is treated
> > as a copy with all destination registers with a low priority. In reality what
> > appears to happen is that the first dead source is treated as a copy. This
> > leads to non-intuitive allocations in eg. 4-register FMAs. Here you'd
> > prefer to have the accumulator and destination to use the same register
> > when possible: so fmadd d2, d0, d5, d2 instead of fmadd d0, d0, d5, d2.
>
> You could add a preferred alternative that uses "0" to such instruction
> patterns, will that help?
What is a preferred alternative? The current register allocator simply ignores
any combination of "0r", "r0", ("r", "0") and ("0", "r") and just picks the most
generic alternative. So we need a new way to specify a move preference
which won't constrain the allocation ("0" would always force the preference but
will also insert redundant moves which then cannot be removed later).
Wilco