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Re: [AArch64, PATCH] Improve Neon store of zero
- From: Wilco Dijkstra <Wilco dot Dijkstra at arm dot com>
- To: GCC Patches <gcc-patches at gcc dot gnu dot org>, "richard dot sandiford at linaro dot org" <richard dot sandiford at linaro dot org>, Jackson Woodruff <jackson dot woodruff at foss dot arm dot com>
- Cc: nd <nd at arm dot com>, James Greenhalgh <James dot Greenhalgh at arm dot com>, "Richard Earnshaw" <Richard dot Earnshaw at arm dot com>
- Date: Wed, 23 Aug 2017 14:35:13 +0000
- Subject: Re: [AArch64, PATCH] Improve Neon store of zero
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Richard Sandiford wrote:
>
> Sorry for only noticing now, but the call to aarch64_legitimate_address_p
> is asking whether the MEM itself is a legitimate LDP/STP address. Also,
> it might be better to pass false for strict_p, since this can be called
> before RA. So maybe:
>
> if (GET_CODE (operands[0]) == MEM
> && !(aarch64_simd_imm_zero (operands[1], <MODE>mode)
> && aarch64_mem_pair_operand (operands[0], <MODE>mode)))
Is there any reason for doing this check at all (or at least this early during
expand)?
There is a similar issue with this part:
(define_insn "*aarch64_simd_mov<mode>"
[(set (match_operand:VQ 0 "nonimmediate_operand"
- "=w, m, w, ?r, ?w, ?r, w")
+ "=w, Ump, m, w, ?r, ?w, ?r, w")
The Ump causes the instruction to always split off the address offset. Ump
cannot be used in patterns that are generated before register allocation as it
also calls laarch64_legitimate_address_p with strict_p set to true.
Wilco