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[PATCH, rs6000] 3/3 Add x86 SSE <xmmintrin.h> intrinsics to GCC PPC64LE taget


This it part 3/3 for contributing PPC64LE support for X86 SSE
instrisics. This patch includes testsuite/gcc.target tests for the
intrinsics included by xmmintrin.h. 

For these tests I added -Wno-psabi to dg-options to suppress warnings
associated with the vector ABI change in GCC5. These warning are
associated with unions defined in m128-check.h (ported with minimal
change from i386). This removes some noise from make check.


[gcc/testsuite]

2017-08-16  Steven Munroe  <munroesj@gcc.gnu.org>

	* gcc.target/powerpc/m128-check.h: New file.
	* gcc.target/powerpc/sse-check.h: New file.
	* gcc.target/powerpc/sse-movmskps-1.c: New file.
	* gcc.target/powerpc/sse-movlps-2.c: New file.
	* gcc.target/powerpc/sse-pavgw-1.c: New file.
	* gcc.target/powerpc/sse-cvttss2si-1.c: New file.
	* gcc.target/powerpc/sse-cvtpi32x2ps-1.c: New file.
	* gcc.target/powerpc/sse-cvtss2si-1.c: New file.
	* gcc.target/powerpc/sse-divss-1.c: New file.
	* gcc.target/powerpc/sse-movhps-1.c: New file.
	* gcc.target/powerpc/sse-cvtsi2ss-2.c: New file.
	* gcc.target/powerpc/sse-subps-1.c: New file.
	* gcc.target/powerpc/sse-minps-1.c: New file.
	* gcc.target/powerpc/sse-pminub-1.c: New file.
	* gcc.target/powerpc/sse-cvtpu16ps-1.c: New file.
	* gcc.target/powerpc/sse-shufps-1.c: New file.
	* gcc.target/powerpc/sse-ucomiss-2.c: New file.
	* gcc.target/powerpc/sse-maxps-1.c: New file.
	* gcc.target/powerpc/sse-pmaxub-1.c: New file.
	* gcc.target/powerpc/sse-movmskb-1.c: New file.
	* gcc.target/powerpc/sse-ucomiss-4.c: New file.
	* gcc.target/powerpc/sse-unpcklps-1.c: New file.
	* gcc.target/powerpc/sse-mulps-1.c: New file.
	* gcc.target/powerpc/sse-rcpps-1.c: New file.
	* gcc.target/powerpc/sse-pminsw-1.c: New file.
	* gcc.target/powerpc/sse-ucomiss-6.c: New file.
	* gcc.target/powerpc/sse-subss-1.c: New file.
	* gcc.target/powerpc/sse-movss-2.c: New file.
	* gcc.target/powerpc/sse-pmaxsw-1.c: New file.
	* gcc.target/powerpc/sse-minss-1.c: New file.
	* gcc.target/powerpc/sse-movaps-2.c: New file.
	* gcc.target/powerpc/sse-movlps-1.c: New file.
	* gcc.target/powerpc/sse-maxss-1.c: New file.
	* gcc.target/powerpc/sse-movhlps-1.c: New file.
	* gcc.target/powerpc/sse-cvttss2si-2.c: New file.
	* gcc.target/powerpc/sse-cvtpi8ps-1.c: New file.
	* gcc.target/powerpc/sse-cvtpi32ps-1.c: New file.
	* gcc.target/powerpc/sse-mulss-1.c: New file.
	* gcc.target/powerpc/sse-cvtsi2ss-1.c: New file.
	* gcc.target/powerpc/sse-cvtss2si-2.c: New file.
	* gcc.target/powerpc/sse-movlhps-1.c: New file.
	* gcc.target/powerpc/sse-movhps-2.c: New file.
	* gcc.target/powerpc/sse-rsqrtps-1.c: New file.
	* gcc.target/powerpc/sse-xorps-1.c: New file.
	* gcc.target/powerpc/sse-cvtpspi8-1.c: New file.
	* gcc.target/powerpc/sse-orps-1.c: New file.
	* gcc.target/powerpc/sse-addps-1.c: New file.
	* gcc.target/powerpc/sse-cvtpi16ps-1.c: New file.
	* gcc.target/powerpc/sse-ucomiss-1.c: New file.
	* gcc.target/powerpc/sse-ucomiss-3.c: New file.
	* gcc.target/powerpc/sse-pmulhuw-1.c: New file.
	* gcc.target/powerpc/sse-andps-1.c: New file.
	* gcc.target/powerpc/sse-cmpss-1.c: New file.
	* gcc.target/powerpc/sse-divps-1.c: New file.
	* gcc.target/powerpc/sse-andnps-1.c: New file.
	* gcc.target/powerpc/sse-ucomiss-5.c: New file.
	* gcc.target/powerpc/sse-movss-1.c: New file.
	* gcc.target/powerpc/sse-sqrtps-1.c: New file.
	* gcc.target/powerpc/sse-cvtpu8ps-1.c: New file.
	* gcc.target/powerpc/sse-cvtpspi16-1.c: New file.
	* gcc.target/powerpc/sse-movaps-1.c: New file.
	* gcc.target/powerpc/sse-movss-3.c: New file.
	* gcc.target/powerpc/sse-unpckhps-1.c: New file.
	* gcc.target/powerpc/sse-addss-1.c: New file.
	* gcc.target/powerpc/sse-psadbw-1.c: New file.


Index: gcc/testsuite/gcc.target/powerpc/sse-movmskps-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-movmskps-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-movmskps-1.c	(revision 0)
@@ -0,0 +1,45 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_movmskps_1
+#endif
+
+#include <xmmintrin.h>
+
+static int
+__attribute__((noinline, unused))
+test (__m128 a)
+{
+  return _mm_movemask_ps (a); 
+}
+
+static void
+TEST (void)
+{
+  union128 u;
+  float s[4] = {-2134.3343, 1234.635654, 1.2234, -876.8976};
+  int d;
+  int e = 0;
+  int i;
+
+  u.x = _mm_loadu_ps (s);   
+  d = test (u.x);
+
+  for (i = 0; i < 4; i++)
+    if (s[i] < 0)
+      e |= (1 << i);
+
+  if (checkVi (&d, &e, 1))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-movlps-2.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-movlps-2.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-movlps-2.c	(revision 0)
@@ -0,0 +1,44 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_movlps_2
+#endif
+
+#include <xmmintrin.h>
+
+static void
+__attribute__((noinline, unused))
+test (__m64 *p, __m128 a)
+{
+  __asm("" : "+v"(a));
+  return _mm_storel_pi (p, a);
+}
+
+static void
+TEST (void)
+{
+  union128 s1;
+  float e[2];
+  float d[2];
+
+  s1.x = _mm_set_ps (5.13, 6.12, 7.11, 8.9);
+ 
+  test ((__m64 *)d, s1.x);
+
+  e[0] = s1.a[0];
+  e[1] = s1.a[1];
+
+  if (checkVf (d, e, 2))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-pavgw-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-pavgw-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-pavgw-1.c	(revision 0)
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_pavgw_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m64
+__attribute__((noinline, unused))
+test (__m64 s1, __m64 s2)
+{
+  return _mm_avg_pu16 (s1, s2);
+}
+
+static void 
+TEST (void)
+{
+  __m64_union u, s1, s2;
+  __m64_union e;
+  int i, tmp;
+
+  s1.as_m64 = _mm_set_pi16 (1, 2, 3, 4);
+  s2.as_m64 = _mm_set_pi16 (11, 98, 76, -100);
+  u.as_m64 = test (s1.as_m64, s2.as_m64);
+
+  for (i = 0; i < 4; i++)
+    {
+      tmp = (unsigned short) s1.as_short[i] + (unsigned short) s2.as_short[i]
+	  + 1;
+      e.as_short[i] = tmp >> 1;
+    }
+
+  if (u.as_m64 != e.as_m64)
+#if DEBUG
+    {
+      printf ("test_mmx_pavgw_1; failed\n");
+      printf ("\t _mm_avg_pu16 (%llx, %llx) -> %llx != %llx\n", s1.as_m64,
+	      s2.as_m64, u.as_m64, e.as_m64);
+    }
+#else
+  abort ();
+#endif
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-cvttss2si-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-cvttss2si-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-cvttss2si-1.c	(revision 0)
@@ -0,0 +1,41 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_cvttss2si_1
+#endif
+
+#include <xmmintrin.h>
+
+static int
+__attribute__((noinline, unused))
+test (__m128 p)
+{
+  __asm("" : "+v"(p));
+  return _mm_cvttss_si32 (p); 
+}
+
+static void
+TEST (void)
+{
+  union128 s1;
+  int d;
+  int e;
+   
+  s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46);
+  d = test (s1.x); 
+  e = (int)s1.a[0];  
+
+  if (e != d)
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-cvtpi32x2ps-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-cvtpi32x2ps-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-cvtpi32x2ps-1.c	(revision 0)
@@ -0,0 +1,43 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_cvtpi32x2ps_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m64  __A, __m64  __B)
+{
+  return _mm_cvtpi32x2_ps (__A, __B);
+}
+
+static void
+TEST (void)
+{
+  __m64_union s1, s2;
+  union128 u;
+  float e[4] = {1000.0, -20000.0, 43.0, 546.0};
+
+  /* input signed in {1000, -20000, 43, 546}.  */
+  s1.as_m64 = _mm_setr_pi32 (1000, -20000);
+  s2.as_m64 = _mm_setr_pi32 (43, 546);
+   
+  u.x = test (s1.as_m64, s2.as_m64);
+
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-cvtss2si-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-cvtss2si-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-cvtss2si-1.c	(revision 0)
@@ -0,0 +1,41 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_cvtss2si_1
+#endif
+
+#include <xmmintrin.h>
+
+static int
+__attribute__((noinline, unused))
+test (__m128 p)
+{
+  return _mm_cvtss_si32 (p); 
+}
+
+//static
+void
+TEST (void)
+{
+  union128 s1;
+  int d;
+  int e;
+   
+  s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46);
+  d = test (s1.x); 
+  e = (int)s1.a[0];  
+
+  if (e != d)
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-divss-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-divss-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-divss-1.c	(revision 0)
@@ -0,0 +1,44 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_divss_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 s1, __m128 s2)
+{
+  return _mm_div_ss (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union128 u, s1, s2;
+  float e[4];
+   
+  s1.x = _mm_set_ps (41124.234,6678.346,8653.65635,856.43576);
+  s2.x = _mm_set_ps (2134.3343,6678.346,453.345635,54646.464356);
+  u.x = test (s1.x, s2.x); 
+   
+  e[0] = s1.a[0] / s2.a[0];
+  e[1] = s1.a[1];
+  e[2] = s1.a[2];
+  e[3] = s1.a[3];
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-movhps-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-movhps-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-movhps-1.c	(revision 0)
@@ -0,0 +1,47 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_movhps_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 a, __m64 *p)
+{
+  __asm("" : "+v"(a));
+  return _mm_loadh_pi (a, p); 
+}
+
+static void
+TEST (void)
+{
+  union128 u, s1;
+  float d[2] = {24.43, 68.346};
+  float e[4] = {1.17, 2.16, 3.15, 4.14};
+
+  s1.x = _mm_set_ps (5.13, 6.12, 7.11, 8.9);
+  u.x = _mm_loadu_ps (e);
+ 
+  u.x = test (s1.x, (__m64 *)d);
+
+  e[0] = s1.a[0];
+  e[1] = s1.a[1];
+  e[2] = d[0];
+  e[3] = d[1];
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-check.h
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-check.h	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-check.h	(revision 0)
@@ -0,0 +1,41 @@
+#include <stdlib.h>
+#include "m128-check.h"
+
+#define DEBUG 1
+
+#define TEST sse_test
+
+static void sse_test (void);
+
+static void
+__attribute__ ((noinline))
+do_test (void)
+{
+  sse_test ();
+}
+
+int
+main ()
+  {
+#ifdef __BUILTIN_CPU_SUPPORTS__
+    /* Most SSE intrinsic operations can be implemented via VMX
+       instructions, but some operations may be faster / simpler
+       using the POWER8 VSX instructions.  This is especially true
+       when we are transferring / converting to / from __m64 types.
+       The direct register transfer instructions from POWER8 are
+       especially important.  So we test for arch_2_07.  */
+    if ( __builtin_cpu_supports ("arch_2_07") )
+      {
+	do_test ();
+#ifdef DEBUG
+	printf ("PASSED\n");
+#endif
+      }
+#ifdef DEBUG
+    else
+    printf ("SKIPPED\n");
+#endif
+#endif /* __BUILTIN_CPU_SUPPORTS__ */
+    return 0;
+  }
+
Index: gcc/testsuite/gcc.target/powerpc/sse-cvtsi2ss-2.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-cvtsi2ss-2.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-cvtsi2ss-2.c	(revision 0)
@@ -0,0 +1,40 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_cvtsi2ss_2
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 p, long long b)
+{
+  return _mm_cvtsi64_ss (p, b); 
+}
+
+static void
+TEST (void)
+{
+  union128 u, s1;
+  long long b = 4294967295133LL;
+  float e[4] = { 24.43, 68.346, 43.35, 546.46 };
+   
+  s1.x = _mm_set_ps (e[3], e[2], e[1], e[0]);
+  u.x = test (s1.x, b); 
+  e[0] = (float)b;  
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-subps-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-subps-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-subps-1.c	(revision 0)
@@ -0,0 +1,44 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_subps_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 s1, __m128 s2)
+{
+  return _mm_sub_ps (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union128 u, s1, s2;
+  float e[4];
+   
+  s1.x = _mm_set_ps (41124.234,6678.346,8653.65635,856.43576);
+  s2.x = _mm_set_ps (2134.3343,6678.346,453.345635,54646.464356);
+  u.x = test (s1.x, s2.x); 
+   
+  e[0] = s1.a[0] - s2.a[0];
+  e[1] = s1.a[1] - s2.a[1];
+  e[2] = s1.a[2] - s2.a[2];
+  e[3] = s1.a[3] - s2.a[3];
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-minps-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-minps-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-minps-1.c	(revision 0)
@@ -0,0 +1,43 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_minps_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 s1, __m128 s2)
+{
+  return _mm_min_ps (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union128 u, s1, s2;
+  float e[4];
+  int i;
+   
+  s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46);
+  s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14);
+  u.x = test (s1.x, s2.x); 
+  
+  for (i = 0; i < 4; i++)
+    e[i] = s1.a[i] < s2.a[i] ? s1.a[i]:s2.a[i];   
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-pminub-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-pminub-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-pminub-1.c	(revision 0)
@@ -0,0 +1,44 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_pminub_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m64
+__attribute__((noinline, unused))
+test (__m64 s1, __m64 s2)
+{
+  return _mm_min_pu8 (s1, s2);
+}
+
+static void 
+TEST (void)
+{
+  __m64_union u, e, s1, s2;
+  int i;
+
+  s1.as_m64 = _mm_set_pi8 (1, 2, 3, 4, 5, 6, 7, 8);
+  s2.as_m64 = _mm_set_pi8 (8, 7, 6, 5, 4, 3, 2, 1);
+  u.as_m64 = test (s1.as_m64, s2.as_m64);
+
+  for (i = 0; i < 8; i++)
+    e.as_char[i] =
+	((unsigned char) s1.as_char[i] < (unsigned char) s2.as_char[i]) ?
+	    s1.as_char[i] : s2.as_char[i];
+
+  if (u.as_m64 != e.as_m64)
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-cvtpu16ps-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-cvtpu16ps-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-cvtpu16ps-1.c	(revision 0)
@@ -0,0 +1,41 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_cvtpu16ps_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m64  __A)
+{
+  return _mm_cvtpu16_ps (__A);
+}
+
+static void
+TEST (void)
+{
+  __m64_union s1;
+  union128 u;
+  float e[4] = {1000.0, 45536.0, 45.0, 65535.0};
+
+  /* input unsigned short {1000, 45536, 45, 65535}.  */
+  s1.as_m64 = _mm_setr_pi16 (1000, -20000, 45, -1);
+   
+  u.x = test (s1.as_m64);
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/m128-check.h
===================================================================
--- gcc/testsuite/gcc.target/powerpc/m128-check.h	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/m128-check.h	(revision 0)
@@ -0,0 +1,222 @@
+#include <stdio.h>
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifdef __ALTIVEC__
+#include <xmmintrin.h>
+
+#ifdef __VSX_SSE2__
+#include <emmintrin.h>
+
+typedef union
+{
+  __m128i x;
+  char a[16];
+} union128i_b;
+
+typedef union
+{
+  __m128i x;
+  unsigned char a[16];
+} union128i_ub;
+
+typedef union
+{
+  __m128i x;
+  short a[8];
+} union128i_w;
+
+typedef union
+{
+  __m128i x;
+  unsigned short a[8];
+} union128i_uw;
+
+typedef union
+{
+  __m128i x;
+  int a[4];
+} union128i_d;
+
+typedef union
+{
+  __m128i x;
+  unsigned int a[4];
+} union128i_ud;
+
+#if __VSX__
+typedef union
+{
+  __m128i x;
+  long long a[2];
+} union128i_q;
+
+typedef union
+{
+  __m128i x;
+  unsigned long long a[2];
+} union128i_uq;
+
+
+typedef union
+{
+  __m128d x;
+  double a[2];
+} union128d;
+#endif
+
+#endif
+typedef union
+{
+  __m128  x;
+  float a[4];
+  int i[4];
+} union128;
+
+#ifndef ARRAY_SIZE
+#define ARRAY_SIZE(A) (sizeof (A) / sizeof ((A)[0]))
+#endif
+
+#ifdef DEBUG
+#define PRINTF printf
+#else
+#define PRINTF(...)	
+#endif
+
+#define CHECK_EXP(UINON_TYPE, VALUE_TYPE, FMT)		\
+static int						\
+__attribute__((noinline, unused))			\
+check_##UINON_TYPE (UINON_TYPE u, const VALUE_TYPE *v)	\
+{							\
+  int i;						\
+  int err = 0;						\
+							\
+  for (i = 0; i < ARRAY_SIZE (u.a); i++)		\
+    if (u.a[i] != v[i])					\
+      {							\
+	err++;						\
+	PRINTF ("%i: " FMT " != " FMT "\n",		\
+		i, v[i], u.a[i]);			\
+      }							\
+  return err;						\
+}
+
+#ifdef __VSX_SSE2__
+CHECK_EXP (union128i_b, char, "%d")
+CHECK_EXP (union128i_ub, unsigned char, "%d")
+CHECK_EXP (union128i_w, short, "%d")
+CHECK_EXP (union128i_uw, unsigned short, "%d")
+CHECK_EXP (union128i_d, int, "0x%x")
+CHECK_EXP (union128i_ud, unsigned int, "0x%x")
+#ifdef __VSX__
+CHECK_EXP (union128i_q, long long, "0x%llx")
+CHECK_EXP (union128i_uq, unsigned long long, "0x%llx")
+CHECK_EXP (union128d, double, "%f")
+#endif
+#endif
+
+CHECK_EXP (union128, float, "%f")
+
+#define ESP_FLOAT 0.000001
+#define ESP_DOUBLE 0.000001
+#define CHECK_ARRAY(ARRAY, TYPE, FMT)                   \
+static int                                              \
+__attribute__((noinline, unused))                       \
+checkV##ARRAY (const TYPE *v, const TYPE *e, int n)     \
+{                                                       \
+  int i;                                                \
+  int err = 0;                                          \
+                                                        \
+  for (i = 0; i < n; i++)                               \
+    if (v[i] != e[i])                                   \
+      {                                                 \
+        err++;                                          \
+        PRINTF ("%i: " FMT " != " FMT "\n",             \
+                i, v[i], e[i]);                 \
+      }                                                 \
+  return err;                                           \
+}
+
+CHECK_ARRAY(c, char, "0x%hhx")
+CHECK_ARRAY(s, short, "0x%hx")
+CHECK_ARRAY(i, int, "0x%x")
+CHECK_ARRAY(l, long long, "0x%llx")
+CHECK_ARRAY(uc, unsigned char, "0x%hhx")
+CHECK_ARRAY(us, unsigned short, "0x%hx")
+CHECK_ARRAY(ui, unsigned int, "0x%x")
+CHECK_ARRAY(ul, unsigned long long, "0x%llx")
+
+
+
+#define CHECK_FP_ARRAY(ARRAY, TYPE, ESP, FMT)                   \
+static int                                              \
+__attribute__((noinline, unused))                       \
+checkV##ARRAY (const TYPE *v, const TYPE *e, int n)     \
+{                                                       \
+  int i;                                                \
+  int err = 0;                                          \
+                                                        \
+  for (i = 0; i < n; i++)                               \
+    if (v[i] > (e[i] + (ESP)) || v[i] < (e[i] - (ESP))) \
+    if (e[i] != v[i])                                   \
+      {                                                 \
+        err++;                                          \
+        PRINTF ("%i: " FMT " != " FMT "\n",             \
+                i, v[i], e[i]);                 \
+      }                                                 \
+  return err;                                           \
+}
+
+CHECK_FP_ARRAY (d, double, ESP_DOUBLE, "%f")
+CHECK_FP_ARRAY (f, float, ESP_FLOAT, "%f")
+
+#ifdef NEED_IEEE754_FLOAT
+union ieee754_float
+{
+   float d;
+   struct 
+   {
+      unsigned long frac : 23;
+      unsigned exp : 8;
+      unsigned sign : 1;
+   } bits __attribute__((packed));
+};
+#endif
+
+#ifdef NEED_IEEE754_DOUBLE
+union ieee754_double
+{
+   double d;
+   struct 
+   {
+      unsigned long frac1 : 32;
+      unsigned long frac0 : 20;
+      unsigned exp : 11;
+      unsigned sign : 1;
+   } bits __attribute__((packed));
+};
+#endif
+
+#define CHECK_FP_EXP(UINON_TYPE, VALUE_TYPE, ESP, FMT)		\
+static int							\
+__attribute__((noinline, unused))				\
+check_fp_##UINON_TYPE (UINON_TYPE u, const VALUE_TYPE *v)	\
+{								\
+  int i;							\
+  int err = 0;							\
+								\
+  for (i = 0; i < ARRAY_SIZE (u.a); i++)			\
+    if (u.a[i] > (v[i] + (ESP)) || u.a[i] < (v[i] - (ESP)))	\
+      {								\
+	err++;							\
+	PRINTF ("%i: " FMT " != " FMT "\n",			\
+		i, v[i], u.a[i]);				\
+      }								\
+  return err;							\
+}
+
+CHECK_FP_EXP (union128, float, ESP_FLOAT, "%f")
+#ifdef __VSX_SSE2__
+CHECK_FP_EXP (union128d, double, ESP_DOUBLE, "%f")
+#endif
+#endif /* __ALTIVEC__ */
Index: gcc/testsuite/gcc.target/powerpc/sse-shufps-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-shufps-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-shufps-1.c	(revision 0)
@@ -0,0 +1,61 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_shufps_1
+#endif
+
+#define MASK 0xab
+
+#include <xmmintrin.h>
+
+float select4(const float *src, unsigned int control)
+{
+    switch(control) {
+    case 0:
+        return src[0];
+    case 1:
+        return src[1];
+    case 2:
+        return src[2];
+    case 3:
+        return src[3];
+    }
+    return -1;
+}
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 s1, __m128 s2)
+{
+  return _mm_shuffle_ps (s1, s2, MASK); 
+}
+
+static void TEST (void)
+{
+  union128 u, s1, s2;
+  float e[4] =
+    { 0.0 };
+
+  s1.x = _mm_set_ps (1.1, 1.2, 1.3, 1.4);
+  s2.x = _mm_set_ps (2.1, 2.2, 2.3, 2.4);
+  u.x = test (s1.x, s2.x);
+
+  e[0] = select4 (s1.a, (MASK >> 0) & 0x3);
+  e[1] = select4 (s1.a, (MASK >> 2) & 0x3);
+  e[2] = select4 (s2.a, (MASK >> 4) & 0x3);
+  e[3] = select4 (s2.a, (MASK >> 6) & 0x3);
+
+  if (check_union128 (u, e))
+  abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-ucomiss-2.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-ucomiss-2.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-ucomiss-2.c	(revision 0)
@@ -0,0 +1,41 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_ucomiss_2
+#endif
+
+#include <xmmintrin.h>
+
+static int 
+__attribute__((noinline, unused))
+test (__m128 s1, __m128 s2)
+{
+  return _mm_ucomilt_ss (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union128  s1, s2;
+  int d[1];
+  int e[1];
+
+  s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46);
+  s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14);
+  d[0] = test (s1.x, s2.x); 
+  e[0] = s1.a[0] < s2.a[0];
+
+  if (checkVi (d, e, 1))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-maxps-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-maxps-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-maxps-1.c	(revision 0)
@@ -0,0 +1,43 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_maxps_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 s1, __m128 s2)
+{
+  return _mm_max_ps (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union128 u, s1, s2;
+  float e[4];
+  int i;
+   
+  s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46);
+  s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14);
+  u.x = test (s1.x, s2.x); 
+  
+  for (i = 0; i < 4; i++)
+    e[i] = s1.a[i] > s2.a[i] ? s1.a[i]:s2.a[i];   
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-pmaxub-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-pmaxub-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-pmaxub-1.c	(revision 0)
@@ -0,0 +1,43 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_pmaxub_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m64
+__attribute__((noinline, unused))
+test (__m64 s1, __m64 s2)
+{
+  return _mm_max_pu8 (s1, s2);
+}
+
+static void TEST (void)
+{
+  __m64_union u, e, s1, s2;
+  int i;
+
+  s1.as_m64 = _mm_set_pi8 (1, 2, 3, 4, 5, 6, 7, 8);
+  s2.as_m64 = _mm_set_pi8 (8, 7, 6, 5, 4, 3, 2, 1);
+  u.as_m64 = test (s1.as_m64, s2.as_m64);
+
+  for (i = 0; i < 8; i++)
+    e.as_char[i] =
+	((unsigned char) s1.as_char[i] > (unsigned char) s2.as_char[i]) ?
+	    s1.as_char[i] : s2.as_char[i];
+
+  if (u.as_m64 != e.as_m64)
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-movmskb-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-movmskb-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-movmskb-1.c	(revision 0)
@@ -0,0 +1,45 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_movmskb_1
+#endif
+
+#include <xmmintrin.h>
+
+static int
+__attribute__((noinline, unused))
+test (__m64 a)
+{
+  return _mm_movemask_pi8 (a);
+}
+
+static void
+TEST (void)
+{
+  __m64_union u;
+  int d;
+  int e = 0;
+  int i;
+
+  u.as_m64 = _mm_set_pi8 (1,2,3,4,-80,-40,-100,-15);;
+  d = test (u.as_m64);
+
+  for (i = 0; i < 8; i++)
+    if (u.as_signed_char[i] < 0)
+      e |= (1 << i);
+
+  if (d != e)
+    abort ();
+
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-ucomiss-4.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-ucomiss-4.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-ucomiss-4.c	(revision 0)
@@ -0,0 +1,41 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_ucomiss_4
+#endif
+
+#include <xmmintrin.h>
+
+static int 
+__attribute__((noinline, unused))
+test (__m128 s1, __m128 s2)
+{
+  return _mm_ucomigt_ss (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union128  s1, s2;
+  int d[1];
+  int e[1];
+
+  s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46);
+  s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14);
+  d[0] = test (s1.x, s2.x); 
+  e[0] = s1.a[0] > s2.a[0];
+
+  if (checkVi (d, e, 1))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-unpcklps-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-unpcklps-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-unpcklps-1.c	(revision 0)
@@ -0,0 +1,45 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_unpacklps_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 s1, __m128 s2)
+{
+  __asm("" : "+v"(s1), "+v"(s2));
+  return _mm_unpacklo_ps (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union128 u, s1, s2;
+  float e[4];
+   
+  s1.x = _mm_set_ps (41124.234,6678.346,8653.65635,856.43576);
+  s2.x = _mm_set_ps (2134.3343,6678.346,453.345635,54646.464356);
+  u.x = test (s1.x, s2.x); 
+   
+  e[0] = s1.a[0];
+  e[1] = s2.a[0];
+  e[2] = s1.a[1];
+  e[3] = s2.a[1];
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-mulps-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-mulps-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-mulps-1.c	(revision 0)
@@ -0,0 +1,44 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_mulps_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 s1, __m128 s2)
+{
+  return _mm_mul_ps (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union128 u, s1, s2;
+  float e[4];
+   
+  s1.x = _mm_set_ps (41124.234,6678.346,8653.65635,856.43576);
+  s2.x = _mm_set_ps (2134.3343,6678.346,453.345635,54646.464356);
+  u.x = test (s1.x, s2.x); 
+   
+  e[0] = s1.a[0] * s2.a[0];
+  e[1] = s1.a[1] * s2.a[1];
+  e[2] = s1.a[2] * s2.a[2];
+  e[3] = s1.a[3] * s2.a[3];
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-rcpps-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-rcpps-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-rcpps-1.c	(revision 0)
@@ -0,0 +1,46 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_rcpps_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 s1)
+{
+  return _mm_rcp_ps (s1); 
+}
+
+static void
+TEST (void)
+{
+  union128 u, s1;
+  float e[4];
+  int i;
+   
+  s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46);
+  u.x = test (s1.x); 
+  
+  for (i = 0; i < 4; i++)
+    {
+      __m128 tmp = _mm_load_ss (&s1.a[i]);
+      tmp = _mm_rcp_ss (tmp);
+      _mm_store_ss (&e[i], tmp);
+    }
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-pminsw-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-pminsw-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-pminsw-1.c	(revision 0)
@@ -0,0 +1,43 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_pminsw_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m64
+__attribute__((noinline, unused))
+test (__m64 s1, __m64 s2)
+{
+  return _mm_min_pi16 (s1, s2);
+}
+
+static void
+TEST (void)
+{
+  __m64_union u, e, s1, s2;
+  int i;
+
+  s1.as_m64 = _mm_set_pi16 (1, 2, 3, 4);
+  s2.as_m64 = _mm_set_pi16 (4, 3, 2, 1);
+  u.as_m64 = test (s1.as_m64, s2.as_m64);
+
+  for (i = 0; i < 4; i++)
+    e.as_short[i] =
+	s1.as_short[i] < s2.as_short[i] ? s1.as_short[i] : s2.as_short[i];
+
+  if (u.as_m64 != e.as_m64)
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-ucomiss-6.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-ucomiss-6.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-ucomiss-6.c	(revision 0)
@@ -0,0 +1,41 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_ucomiss_6
+#endif
+
+#include <xmmintrin.h>
+
+static int 
+__attribute__((noinline, unused))
+test (__m128 s1, __m128 s2)
+{
+  return _mm_ucomineq_ss (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union128  s1, s2;
+  int d[1];
+  int e[1];
+
+  s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46);
+  s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14);
+  d[0] = test (s1.x, s2.x); 
+  e[0] = s1.a[0] != s2.a[0];
+
+  if (checkVi (d, e, 1))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-subss-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-subss-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-subss-1.c	(revision 0)
@@ -0,0 +1,44 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_subss_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 s1, __m128 s2)
+{
+  return _mm_sub_ss (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union128 u, s1, s2;
+  float e[4];
+   
+  s1.x = _mm_set_ps (41124.234,6678.346,8653.65635,856.43576);
+  s2.x = _mm_set_ps (2134.3343,6678.346,453.345635,54646.464356);
+  u.x = test (s1.x, s2.x); 
+   
+  e[0] = s1.a[0] - s2.a[0];
+  e[1] = s1.a[1];
+  e[2] = s1.a[2];
+  e[3] = s1.a[3];
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-movss-2.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-movss-2.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-movss-2.c	(revision 0)
@@ -0,0 +1,43 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_movss_2
+#endif
+
+#include <xmmintrin.h>
+
+static void
+__attribute__((noinline, unused))
+test (float *e, __m128 a)
+{
+  __asm("" : "+v"(a));
+  return _mm_store_ss (e, a); 
+}
+
+static void
+TEST (void)
+{
+  union128 u;
+  float d[1];
+  float e[1];
+ 
+  u.x = _mm_set_ps (2134.3343,1234.635654, 1.2234, 876.8976);
+
+  test (d, u.x);
+
+  e[0] = u.a[0];
+
+  if (checkVf (d, e, 1))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-pmaxsw-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-pmaxsw-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-pmaxsw-1.c	(revision 0)
@@ -0,0 +1,42 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_pmaxsw_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m64
+__attribute__((noinline, unused))
+test (__m64 s1, __m64 s2)
+{
+  return _mm_max_pi16 (s1, s2);
+}
+
+static void
+TEST (void)
+{
+  __m64_union u, e, s1, s2;
+  int i;
+   
+  s1.as_m64 = _mm_set_pi16 (1,2,3,4);
+  s2.as_m64 = _mm_set_pi16 (4,3,2,1);
+  u.as_m64 = test (s1.as_m64, s2.as_m64);
+
+  for (i=0; i<4; i++)
+    e.as_short[i] = s1.as_short[i]>s2.as_short[i]?s1.as_short[i]:s2.as_short[i];
+
+  if (u.as_m64 != e.as_m64)
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-minss-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-minss-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-minss-1.c	(revision 0)
@@ -0,0 +1,44 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_minss_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 s1, __m128 s2)
+{
+  return _mm_min_ss (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union128 u, s1, s2;
+  float e[4];
+
+  s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46);
+  s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14);
+  u.x = test (s1.x, s2.x); 
+  
+  e[0] = s1.a[0] < s2.a[0] ? s1.a[0]:s2.a[0];   
+  e[1] = s1.a[1];
+  e[2] = s1.a[2];
+  e[3] = s1.a[3];
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-movaps-2.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-movaps-2.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-movaps-2.c	(revision 0)
@@ -0,0 +1,39 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_movaps_2
+#endif
+
+#include <xmmintrin.h>
+
+static void
+__attribute__((noinline, unused))
+test (float *e, __m128 a)
+{
+  _mm_store_ps (e, a); 
+}
+
+static void
+TEST (void)
+{
+  union128 u;
+  float e[4] __attribute__ ((aligned (16))) = {0.0};
+
+  u.x = _mm_set_ps (2134.3343,1234.635654, 1.414, 3.3421);
+
+  test (e, u.x);
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-movlps-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-movlps-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-movlps-1.c	(revision 0)
@@ -0,0 +1,48 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_movlps_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 a, __m64 *p)
+{
+  __asm("" : "+v"(a));
+  return _mm_loadl_pi (a, p);
+}
+
+static void
+TEST (void)
+{
+  union128 u, s1;
+  float d[2] = {24.43, 68.346};
+  float e[4] = {1.17, 2.16, 3.15, 4.14};
+
+  s1.x = _mm_set_ps (5.13, 6.12, 7.11, 8.9);
+  u.x = _mm_loadu_ps (e);
+ 
+  u.x = test (s1.x, (__m64 *)d);
+
+
+  e[0] = d[0];
+  e[1] = d[1];
+  e[2] = s1.a[2];
+  e[3] = s1.a[3];
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-maxss-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-maxss-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-maxss-1.c	(revision 0)
@@ -0,0 +1,44 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_maxss_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 s1, __m128 s2)
+{
+  return _mm_max_ss (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union128 u, s1, s2;
+  float e[4];
+
+  s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46);
+  s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14);
+  u.x = test (s1.x, s2.x); 
+  
+  e[0] = s1.a[0] > s2.a[0] ? s1.a[0]:s2.a[0];   
+  e[1] = s1.a[1]; 
+  e[2] = s1.a[2];
+  e[3] = s1.a[3]; 
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-movhlps-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-movhlps-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-movhlps-1.c	(revision 0)
@@ -0,0 +1,45 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_movhlps_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 s1, __m128 s2)
+{
+  __asm("" : "+v"(s1), "+v"(s2));
+  return _mm_movehl_ps (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union128 u, s1, s2;
+  float e[4];
+   
+  s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46);
+  s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14);
+  u.x = test (s1.x, s2.x); 
+
+  e[0] = s2.a[2];
+  e[1] = s2.a[3];
+  e[2] = s1.a[2];
+  e[3] = s1.a[3];
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-cvttss2si-2.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-cvttss2si-2.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-cvttss2si-2.c	(revision 0)
@@ -0,0 +1,41 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_cvttss2si_2
+#endif
+
+#include <xmmintrin.h>
+
+static long long
+__attribute__((noinline, unused))
+test (__m128 p)
+{
+  __asm("" : "+v"(p));
+  return _mm_cvttss_si64 (p); 
+}
+
+static void
+TEST (void)
+{
+  union128 s1;
+  long long d;
+  long long e;
+   
+  s1.x = _mm_set_ps (24.43, 68.346, 43.35, 429496729501.4);
+  d = test (s1.x); 
+  e = (long long)s1.a[0];  
+
+  if (e != d)
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-cvtpi8ps-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-cvtpi8ps-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-cvtpi8ps-1.c	(revision 0)
@@ -0,0 +1,41 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_cvtpi8ps_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m64  __A)
+{
+  return _mm_cvtpi8_ps (__A);
+}
+
+//static
+void
+TEST (void)
+{
+  __m64_union s1;
+  union128 u;
+  float e[4] = {100.0, -100.0, 45.0, -1.0};
+
+  s1.as_m64 = _mm_setr_pi8 (100, -100, 45, -1, 123, -21, 34, 56);
+   
+  u.x = test (s1.as_m64);
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-cvtpi32ps-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-cvtpi32ps-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-cvtpi32ps-1.c	(revision 0)
@@ -0,0 +1,42 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_cvtpi32ps_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128  __A, __m64  __B)
+{
+  return _mm_cvtpi32_ps (__A, __B);
+}
+
+static void
+TEST (void)
+{
+  __m64_union s1;
+  union128 s2, u;
+  float e[4] = {1000.0, -20000.0, 43.35, 546.46};
+
+  s1.as_m64 = _mm_setr_pi32 (1000, -20000);
+   
+  s2.x = _mm_setr_ps (24.43, 68.346, 43.35, 546.46);
+  u.x = test (s2.x, s1.as_m64);
+
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-mulss-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-mulss-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-mulss-1.c	(revision 0)
@@ -0,0 +1,44 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_mulss_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 s1, __m128 s2)
+{
+  return _mm_mul_ss (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union128 u, s1, s2;
+  float e[4];
+   
+  s1.x = _mm_set_ps (41124.234,6678.346,8653.65635,856.43576);
+  s2.x = _mm_set_ps (2134.3343,6678.346,453.345635,54646.464356);
+  u.x = test (s1.x, s2.x); 
+   
+  e[0] = s1.a[0] * s2.a[0];
+  e[1] = s1.a[1];
+  e[2] = s1.a[2];
+  e[3] = s1.a[3];
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-cvtsi2ss-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-cvtsi2ss-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-cvtsi2ss-1.c	(revision 0)
@@ -0,0 +1,40 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_cvtsi2ss_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 p, int b)
+{
+  return _mm_cvtsi32_ss (p, b); 
+}
+
+static void
+TEST (void)
+{
+  union128 u, s1;
+  int b = 498;
+  float e[4] = { 24.43, 68.346, 43.35, 546.46 };
+   
+  s1.x = _mm_set_ps (e[3], e[2], e[1], e[0]);
+  u.x = test (s1.x, b); 
+  e[0] = (float)b;  
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-cvtss2si-2.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-cvtss2si-2.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-cvtss2si-2.c	(revision 0)
@@ -0,0 +1,40 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_cvtss2si_2
+#endif
+
+#include <xmmintrin.h>
+
+static long long
+__attribute__((noinline, unused))
+test (__m128 p)
+{
+  return _mm_cvtss_si64 (p); 
+}
+
+static void
+TEST (void)
+{
+  union128 s1;
+  long long d;
+  long long e;
+   
+  s1.x = _mm_set_ps (344.4, 68.346, 43.35, 429496729501.4);
+  d = test (s1.x); 
+  e = (long long)s1.a[0];  
+
+  if (e != d)
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-movlhps-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-movlhps-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-movlhps-1.c	(revision 0)
@@ -0,0 +1,47 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_movlhps_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 a, __m128 b)
+{
+  __asm("" : "+v"(a), "+v"(a));
+  return _mm_movelh_ps (a, b); 
+}
+
+static void
+TEST (void)
+{
+  union128 u, s1, s2;
+  float e[4]; 
+
+  s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46);
+  s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14);
+  u.x = _mm_set1_ps (0.0);
+
+  u.x = test (s1.x, s2.x);
+
+  e[0] = s1.a[0];
+  e[1] = s1.a[1];
+  e[2] = s2.a[0];
+  e[3] = s2.a[1];
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-movhps-2.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-movhps-2.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-movhps-2.c	(revision 0)
@@ -0,0 +1,44 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_movhps_2
+#endif
+
+#include <xmmintrin.h>
+
+static void
+__attribute__((noinline, unused))
+test (__m64 *p, __m128 a)
+{
+  __asm("" : "+v"(a));
+  return _mm_storeh_pi (p, a); 
+}
+
+static void
+TEST (void)
+{
+  union128 s1;
+  float e[2];
+  float d[2];
+
+  s1.x = _mm_set_ps (5.13, 6.12, 7.11, 8.9);
+ 
+  test ((__m64 *)d, s1.x);
+
+  e[0] = s1.a[2];
+  e[1] = s1.a[3];
+
+  if (checkVf (d, e, 2))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-rsqrtps-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-rsqrtps-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-rsqrtps-1.c	(revision 0)
@@ -0,0 +1,46 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_rsqrtps_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 s1)
+{
+  return _mm_rsqrt_ps (s1); 
+}
+
+static void
+TEST (void)
+{
+  union128 u, s1;
+  float e[4];
+  int i;
+   
+  s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46);
+  u.x = test (s1.x); 
+  
+  for (i = 0; i < 4; i++)
+    {
+      __m128 tmp = _mm_load_ss (&s1.a[i]);
+      tmp = _mm_rsqrt_ss (tmp);
+      _mm_store_ss (&e[i], tmp);
+    }
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-xorps-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-xorps-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-xorps-1.c	(revision 0)
@@ -0,0 +1,51 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_xorps_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 s1, __m128 s2)
+{
+  return _mm_xor_ps (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union {
+    float f[4];
+    int   i[4];
+  }source1, source2, e;
+
+  union128 u, s1, s2;
+  int i;
+   
+  s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46);
+  s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14);
+
+  _mm_storeu_ps (source1.f, s1.x);
+  _mm_storeu_ps (source2.f, s2.x);
+
+  u.x = test (s1.x, s2.x); 
+  
+  for (i = 0; i < 4; i++)
+    e.i[i] = source1.i[i] ^ source2.i[i];   
+
+  if (check_union128 (u, e.f))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-cvtpspi8-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-cvtpspi8-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-cvtpspi8-1.c	(revision 0)
@@ -0,0 +1,41 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_cvtpspi8_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m64
+__attribute__((noinline, unused))
+test (__m128 p)
+{
+  return _mm_cvtps_pi8 (p);
+}
+
+static void 
+TEST (void)
+{
+  union128 s1;
+  __m64 d;
+  __m64 e;
+
+  s1.x = _mm_setr_ps (24.43, 68.546, 43.35, -46.46);
+  d = test (s1.x);
+
+  e = _mm_setr_pi8 (24, 69, 43, -46, 0, 0, 0, 0);
+
+  if (e != d)
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-orps-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-orps-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-orps-1.c	(revision 0)
@@ -0,0 +1,51 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_orps_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 s1, __m128 s2)
+{
+  return _mm_or_ps (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union {
+    float f[4];
+    int   i[4];
+  }source1, source2, e;
+
+  union128 u, s1, s2;
+  int i;
+   
+  s1.x = _mm_set_ps (24.43, 168.346, 43.35, 546.46);
+  s2.x = _mm_set_ps (10.17, 2.16, 3.15, 4.14);
+
+  _mm_storeu_ps (source1.f, s1.x);
+  _mm_storeu_ps (source2.f, s2.x);
+
+  u.x = test (s1.x, s2.x); 
+  
+  for (i = 0; i < 4; i++)
+    e.i[i] = source1.i[i] | source2.i[i];   
+
+  if (check_union128 (u, e.f))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-addps-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-addps-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-addps-1.c	(revision 0)
@@ -0,0 +1,43 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_addps_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 s1, __m128 s2)
+{
+  return _mm_add_ps (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union128 u, s1, s2;
+  float e[4];
+  int i;
+   
+  s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46);
+  s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14);
+  u.x = test (s1.x, s2.x); 
+  
+  for (i = 0; i < 4; i++)
+    e[i] = s1.a[i] + s2.a[i];   
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-cvtpi16ps-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-cvtpi16ps-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-cvtpi16ps-1.c	(revision 0)
@@ -0,0 +1,40 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_cvtpi16ps_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m64  __A)
+{
+  return _mm_cvtpi16_ps (__A);
+}
+
+static void
+TEST (void)
+{
+  __m64_union s1;
+  union128 u;
+  float e[4] = {1000.0, -20000.0, 45.0, -546.0};
+
+  s1.as_m64 = _mm_setr_pi16 (1000, -20000, 45, -546);
+   
+  u.x = test (s1.as_m64);
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-ucomiss-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-ucomiss-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-ucomiss-1.c	(revision 0)
@@ -0,0 +1,41 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_ucomiss_1
+#endif
+
+#include <xmmintrin.h>
+
+static int 
+__attribute__((noinline, unused))
+test (__m128 s1, __m128 s2)
+{
+  return _mm_ucomieq_ss (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union128  s1, s2;
+  int d[1];
+  int e[1];
+
+  s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46);
+  s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14);
+  d[0] = test (s1.x, s2.x); 
+  e[0] = s1.a[0] == s2.a[0];
+
+  if (checkVi (d, e, 1))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-ucomiss-3.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-ucomiss-3.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-ucomiss-3.c	(revision 0)
@@ -0,0 +1,41 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_ucomiss_3
+#endif
+
+#include <xmmintrin.h>
+
+static int 
+__attribute__((noinline, unused))
+test (__m128 s1, __m128 s2)
+{
+  return _mm_ucomile_ss (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union128  s1, s2;
+  int d[1];
+  int e[1];
+
+  s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46);
+  s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14);
+  d[0] = test (s1.x, s2.x); 
+  e[0] = s1.a[0] <= s2.a[0];
+
+  if (checkVi (d, e, 1))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-pmulhuw-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-pmulhuw-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-pmulhuw-1.c	(revision 0)
@@ -0,0 +1,47 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_pmulhuw_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m64
+__attribute__((noinline, unused))
+test (__m64 s1, __m64 s2)
+{
+  return _mm_mulhi_pu16 (s1, s2);
+}
+
+static void
+TEST (void)
+{
+  __m64_union u, s1, s2;
+  __m64_union e;
+  int i, tmp;
+
+  s1.as_m64 = _mm_set_pi16 (10, 2067, -3033, 90);
+  s2.as_m64 = _mm_set_pi16 (11, 9834, 7444, -10222);
+  u.as_m64 = test (s1.as_m64, s2.as_m64);
+
+  for (i = 0; i < 4; i++)
+    {
+      tmp = (unsigned short)s1.as_short[i] * (unsigned short)s2.as_short[i];
+
+      e.as_short[i] = (tmp & 0xffff0000) >> 16;
+    }
+
+  if (u.as_m64 != e.as_m64)
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-andps-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-andps-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-andps-1.c	(revision 0)
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_andps_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 s1, __m128 s2)
+{
+  return _mm_and_ps (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union128 u, s1, s2;
+  union
+  {
+    float f[4];
+    int   i[4];
+  }source1, source2, e;
+
+  s1.x = _mm_set_ps (34, 545, 955, 67);
+  s2.x = _mm_set_ps (67, 4, 57, 897);
+
+  _mm_storeu_ps (source1.f, s1.x);
+  _mm_storeu_ps (source2.f, s2.x);
+
+  u.x = test (s1.x, s2.x); 
+   
+  e.i[0] = source1.i[0] & source2.i[0];
+  e.i[1] = source1.i[1] & source2.i[1];
+  e.i[2] = source1.i[2] & source2.i[2];
+  e.i[3] = source1.i[3] & source2.i[3];
+
+  if (check_union128 (u, e.f))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-cmpss-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-cmpss-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-cmpss-1.c	(revision 0)
@@ -0,0 +1,70 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_cmpss_1
+#endif
+
+#include <math.h>
+
+static float s1[]={2134.3343, 6678.346, 453.345635, 54646.464356};
+static float s2[]={41124.234, 6678.346, 8653.65635, 856.43576};
+static int dd[] = {1, 2, 3, 4};
+static float d[4];
+static union{int i[4]; float f[4];} e;
+
+void sse_cmp_check(char *id)
+{
+  int *pd = (int*)&d;
+    if(checkVi((int*)d, e.i, 4)){
+	printf("mm_cmp%s_ss FAILED\n", id);
+	printf("\td %f %s %f]\n",
+	       s1[0] , id, s2[1]);
+	printf("\td [%x,%x,%x,%x]\n",
+	       pd[0], pd[1], pd[2], pd[3]);
+	printf("\te [%x,%x,%x,%x]\n",
+	       e.i[0], e.i[1], e.i[2], e.i[3]);
+    }
+}
+
+static void
+TEST ()
+{
+    __m128 source1, source2, dest;
+    int i;
+
+#define CMP(cmp, rel)					\
+    e.i[0] = rel ? -1 : 0;	                        \
+    dest = _mm_loadu_ps((float*)dd);			\
+    source1 = _mm_loadu_ps(s1);				\
+    source2 = _mm_loadu_ps(s2);				\
+    dest = _mm_cmp##cmp##_ss(source1, source2);		\
+    _mm_storeu_ps(d, dest);			        \
+    sse_cmp_check("" #cmp "");
+
+    for(i = 1; i < 4; i++) e.f[i] = s1[i];
+    
+    CMP(eq, !isunordered(s1[0], s2[0]) && s1[0] == s2[0]);
+    CMP(lt, !isunordered(s1[0], s2[0]) && s1[0] < s2[0]);
+    CMP(le, !isunordered(s1[0], s2[0]) && s1[0] <= s2[0]);
+    CMP(unord, isunordered(s1[0], s2[0]));
+    CMP(neq, isunordered(s1[0], s2[0]) || s1[0] != s2[0]);
+    CMP(nlt, isunordered(s1[0], s2[0]) || s1[0] >= s2[0]);
+    CMP(nle, isunordered(s1[0], s2[0]) || s1[0] > s2[0]);
+    CMP(ord, !isunordered(s1[0], s2[0]));
+
+    CMP(ge, isunordered(s1[0], s2[0]) || s1[0] >= s2[0]);
+    CMP(gt, isunordered(s1[0], s2[0]) || s1[0] > s2[0]);
+    CMP(nge, !isunordered(s1[0], s2[0]) && s1[0] < s2[0]);
+    CMP(ngt, !isunordered(s1[0], s2[0]) && s1[0] <= s2[0]);
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-divps-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-divps-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-divps-1.c	(revision 0)
@@ -0,0 +1,44 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_divps_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 s1, __m128 s2)
+{
+  return _mm_div_ps (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union128 u, s1, s2;
+  float e[4];
+   
+  s1.x = _mm_set_ps (41124.234,6678.346,8653.65635,856.43576);
+  s2.x = _mm_set_ps (2134.3343,6678.346,453.345635,54646.464356);
+  u.x = test (s1.x, s2.x); 
+   
+  e[0] = s1.a[0] / s2.a[0];
+  e[1] = s1.a[1] / s2.a[1];
+  e[2] = s1.a[2] / s2.a[2];
+  e[3] = s1.a[3] / s2.a[3];
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-andnps-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-andnps-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-andnps-1.c	(revision 0)
@@ -0,0 +1,46 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_andnps_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 s1, __m128 s2)
+{
+  return _mm_andnot_ps (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union128 u, s1, s2;
+  int source1[4]={34, 545, 955, 67};
+  int source2[4]={67, 4, 57, 897};
+  int e[4];
+   
+  s1.x = _mm_loadu_ps ((float *)source1);
+  s2.x = _mm_loadu_ps ((float *)source2);
+  u.x = test (s1.x, s2.x); 
+   
+  e[0] = (~source1[0]) & source2[0];
+  e[1] = (~source1[1]) & source2[1];
+  e[2] = (~source1[2]) & source2[2];
+  e[3] = (~source1[3]) & source2[3];
+
+  if (check_union128 (u, (float *)e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-ucomiss-5.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-ucomiss-5.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-ucomiss-5.c	(revision 0)
@@ -0,0 +1,41 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_ucomiss_5
+#endif
+
+#include <xmmintrin.h>
+
+static int 
+__attribute__((noinline, unused))
+test (__m128 s1, __m128 s2)
+{
+  return _mm_ucomige_ss (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union128  s1, s2;
+  int d[1];
+  int e[1];
+
+  s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46);
+  s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14);
+  d[0] = test (s1.x, s2.x); 
+  e[0] = s1.a[0] >= s2.a[0];
+
+  if (checkVi (d, e, 1))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-movss-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-movss-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-movss-1.c	(revision 0)
@@ -0,0 +1,50 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_movss_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (float *e)
+{
+  __m128 result;
+
+  __asm("" : "+b"(e));
+
+  result = _mm_load_ss (e);
+  __asm("" : "+v"(result));
+  return result;
+}
+
+static void
+TEST (void)
+{
+  union128 u, s1;
+  float e[4] = {1.1, 2.2, 3.3, 4.4};
+ 
+  s1.x = _mm_set_ps (2134.3343,1234.635654, 1.2234, 876.8976);
+
+  u.x = s1.x;
+  u.x = test (e);
+
+  e[1] = u.a[1];
+  e[2] = u.a[2];
+  e[3] = u.a[3];   
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-sqrtps-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-sqrtps-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-sqrtps-1.c	(revision 0)
@@ -0,0 +1,45 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_sqrtps_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 s1)
+{
+  return _mm_sqrt_ps (s1); 
+}
+
+static void
+TEST (void)
+{
+  union128 u, s1;
+  float e[4];
+  int i;
+   
+  s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46);
+  u.x = test (s1.x); 
+  
+  for (i = 0; i < 4; i++) {
+    __m128 tmp = _mm_load_ss (&s1.a[i]);
+    tmp = _mm_sqrt_ss (tmp);
+    _mm_store_ss (&e[i], tmp);
+    }
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-cvtpu8ps-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-cvtpu8ps-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-cvtpu8ps-1.c	(revision 0)
@@ -0,0 +1,41 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_cvtpu8ps_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m64  __A)
+{
+  return _mm_cvtpu8_ps (__A);
+}
+
+static void
+TEST (void)
+{
+  __m64_union s1;
+  union128 u;
+  float e[4] = {100.0, 156.0, 45.0, 255.0};
+
+  /* input unsigned char {100, 156, 45, 255}.  */
+  s1.as_m64 = _mm_setr_pi8 (100, -100, 45, -1, 123, -21, 34, 56);
+   
+  u.x = test (s1.as_m64);
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-cvtpspi16-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-cvtpspi16-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-cvtpspi16-1.c	(revision 0)
@@ -0,0 +1,41 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_cvtpspi16_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m64
+__attribute__((noinline, unused))
+test (__m128 p)
+{
+  return _mm_cvtps_pi16 (p);
+}
+
+static void 
+TEST (void)
+{
+  union128 s1;
+  __m64 d;
+  __m64 e;
+
+  s1.x = _mm_setr_ps (24.43, 68.546, 43.35, -546.46);
+  d = test (s1.x);
+
+  e = _mm_setr_pi16 (24, 69, 43, -546);
+
+  if (e != d)
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-movaps-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-movaps-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-movaps-1.c	(revision 0)
@@ -0,0 +1,38 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_movaps_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (float *e)
+{
+  return _mm_load_ps (e); 
+}
+
+static void
+TEST (void)
+{
+  union128 u;
+  float e[4] __attribute__ ((aligned (16))) = 
+    {2134.3343,1234.635654, 1.2234, 876.8976};
+
+  u.x = test (e);   
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-movss-3.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-movss-3.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-movss-3.c	(revision 0)
@@ -0,0 +1,46 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_movss_3
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 a, __m128 b)
+{
+  __asm("" : "+v"(a));
+  return _mm_move_ss (a, b); 
+}
+
+static void
+TEST (void)
+{
+  union128 u, s1, s2;
+  float e[4];
+ 
+  s1.x = _mm_set_ps (2134.3343,1234.635654, 1.2234, 876.8976);
+  s2.x = _mm_set_ps (1.1, 2.2, 3.3, 4.4);
+  u.x = _mm_set_ps (5.5, 6.6, 7.7, 8.8);
+  u.x = test (s1.x, s2.x);
+  
+  e[0] = s2.a[0];
+  e[1] = s1.a[1];
+  e[2] = s1.a[2];
+  e[3] = s1.a[3];
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-unpckhps-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-unpckhps-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-unpckhps-1.c	(revision 0)
@@ -0,0 +1,45 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_unpackhps_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 s1, __m128 s2)
+{
+  __asm("" : "+v"(s1), "+v"(s2));
+  return _mm_unpackhi_ps (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union128 u, s1, s2;
+  float e[4];
+   
+  s1.x = _mm_set_ps (41124.234,6678.346,8653.65635,856.43576);
+  s2.x = _mm_set_ps (2134.3343,6678.346,453.345635,54646.464356);
+  u.x = test (s1.x, s2.x); 
+   
+  e[0] = s1.a[2];
+  e[1] = s2.a[2];
+  e[2] = s1.a[3];
+  e[3] = s2.a[3];
+
+  if (check_union128 (u, e))
+    abort ();
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-addss-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-addss-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-addss-1.c	(revision 0)
@@ -0,0 +1,56 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_addss_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m128
+__attribute__((noinline, unused))
+test (__m128 s1, __m128 s2)
+{
+  return _mm_add_ss (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union128 u, s1, s2;
+  float e[4];
+   
+  s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46);
+  s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14);
+  u.x = test (s1.x, s2.x); 
+
+  e[0] = s1.a[0] + s2.a[0];
+  e[1] = s1.a[1];
+  e[2] = s1.a[2];
+  e[3] = s1.a[3];
+
+  if (check_union128 (u, e))
+#if DEBUG
+  {
+	  printf ("sse_test_addss_1; check_union128 failed\n");
+      printf ("\t add ([%f,%f,%f,%f], [%f,%f,%f,%f]) -> [%f,%f,%f,%F]\n",
+    		  s1.x[0], s1.x[1], s1.x[2], s1.x[3],
+    		  s2.x[0], s2.x[1], s2.x[2], s2.x[3],
+			  u.x[0], u.x[1], u.x[2], u.x[3]);
+      printf ("\t expect [%f,%f,%f%f]\n",
+    		  e[0], e[1], e[2], e[3]);
+  }
+#else
+    abort ();
+#endif
+}
Index: gcc/testsuite/gcc.target/powerpc/sse-psadbw-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/sse-psadbw-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/sse-psadbw-1.c	(revision 0)
@@ -0,0 +1,47 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+
+#ifndef CHECK_H
+#define CHECK_H "sse-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse_test_psadbw_1
+#endif
+
+#include <xmmintrin.h>
+
+static __m64
+__attribute__((noinline, unused))
+test (__m64 s1, __m64 s2)
+{
+  return _mm_sad_pu8 (s1, s2);
+}
+
+static void
+TEST (void)
+{
+  __m64_union u, e, s1, s2;
+  unsigned char tmp[8];
+  int i;
+
+  e.as_m64 = 0;
+  s1.as_m64 = _mm_set_pi8 (1, 2, 3, 4, 5, 6, 7, 8);
+  s2.as_m64 = _mm_set_pi8 (8, 7, 6, 5, 4, 3, 2, 1);
+  u.as_m64 = test (s1.as_m64, s2.as_m64);
+
+  for (i = 0; i < 8; i++)
+    tmp [i] = __builtin_abs (s1.as_char[i] - s2.as_char[i]);
+
+  for (i = 0; i < 8; i++)
+    e.as_short[0] += tmp[i];
+
+  if (u.as_m64 != e.as_m64)
+    abort ();
+}



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