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Re: [PATCH][GCC][AArch64] Fix pattern guard relaxations that are allowing more constants than they should.


On Fri, Aug 11, 2017 at 12:01:40PM +0100, Tamar Christina wrote:
> Hi All, 
> 
> 
> Hi previous float immediate patches changed
> 
> aarch64_reg_or_fp_zero into aarch64_reg_or_fp_float
> for each of the movdf/sf/hf causing the RTL to contain
> stores to memory it would never be able to find a matching
> pattern for. Reload would then decide to store them to a
> register instead.
> 
> This didn't cause any incorrect code or failing tests but did change
> scheduling does producing more inefficient code.
> 
> The predicate is not reverted.
>
> Regression tested on aarch64-none-linux-gnu and no regressions.
> 
> OK for trunk?

OK.

Thanks,
James

> 
> Thanks,
> Tamar
> 
> 
> gcc/
> 2017-08-11  Tamar Christina  <tamar.christina@arm.com>
> 	* config/aarch64/aarch64.md (mov<mode>): Change.
> 	(*movhf_aarch64, *movsf_aarch64, *movdf_aarch64):
> 	aarch64_reg_or_fp_float into aarch64_reg_or_fp_zero.
> 	* config/aarch64/predicates.md (aarch64_reg_or_fp_float): Removed.
> 
> -- 



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