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Hi all,
This patch changes patterns in aarch64-simd.md to replace
movi v0.4s, 0
str q0, [x0, 16]
With:
stp xzr, xzr, [x0, 16]
When we are storing zeros to vectors like this:
void f(uint32x4_t *p) {
uint32x4_t x = { 0, 0, 0, 0};
p[1] = x;
}
Bootstrapped and regtested on aarch64 with no regressions.
OK for trunk?
Jackson
gcc/
2017-08-09 Jackson Woodruff <jackson.woodruff@arm.com>
* aarch64-simd.md (mov<mode>): No longer force zero
immediate into register.
(*aarch64_simd_mov<mode>): Add new case for stp
using zero immediate.
gcc/testsuite
2017-08-09 Jackson Woodruff <jackson.woodruff@arm.com>
* gcc.target/aarch64/simd/neon_str_zero.c: New.
Attachment:
patchfile
Description: Text document
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