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[22/77] Replace !VECTOR_MODE_P with is_a <scalar_int_mode>
- From: Richard Sandiford <richard dot sandiford at linaro dot org>
- To: gcc-patches at gcc dot gnu dot org
- Date: Thu, 13 Jul 2017 09:46:45 +0100
- Subject: [22/77] Replace !VECTOR_MODE_P with is_a <scalar_int_mode>
- Authentication-results: sourceware.org; auth=none
- References: <8760ewohsv.fsf@linaro.org>
This patch replaces some checks of !VECTOR_MODE_P with checks
of is_a <scalar_int_mode>, in cases where the scalar integer
modes were the only useful alternatives left.
2017-07-13 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* simplify-rtx.c (simplify_binary_operation_1): Use
is_a <scalar_int_mode> instead of !VECTOR_MODE_P.
Index: gcc/simplify-rtx.c
===================================================================
--- gcc/simplify-rtx.c 2017-07-13 09:18:32.529352614 +0100
+++ gcc/simplify-rtx.c 2017-07-13 09:18:33.217290298 +0100
@@ -2129,7 +2129,7 @@ simplify_binary_operation_1 (enum rtx_co
rtx tem, reversed, opleft, opright;
HOST_WIDE_INT val;
unsigned int width = GET_MODE_PRECISION (mode);
- scalar_int_mode int_mode;
+ scalar_int_mode int_mode, inner_mode;
/* Even if we can't compute a constant result,
there are some cases worth simplifying. */
@@ -3365,27 +3365,24 @@ simplify_binary_operation_1 (enum rtx_co
(subreg:M1 ([a|l]shiftrt:M2 (reg:M2) (const_int <c1 + c2>))
<low_part>). */
if ((code == ASHIFTRT || code == LSHIFTRT)
- && !VECTOR_MODE_P (mode)
+ && is_a <scalar_int_mode> (mode, &int_mode)
&& SUBREG_P (op0)
&& CONST_INT_P (op1)
&& GET_CODE (SUBREG_REG (op0)) == LSHIFTRT
- && !VECTOR_MODE_P (GET_MODE (SUBREG_REG (op0)))
+ && is_a <scalar_int_mode> (GET_MODE (SUBREG_REG (op0)),
+ &inner_mode)
&& CONST_INT_P (XEXP (SUBREG_REG (op0), 1))
- && (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (op0)))
- > GET_MODE_BITSIZE (mode))
+ && GET_MODE_BITSIZE (inner_mode) > GET_MODE_BITSIZE (int_mode)
&& (INTVAL (XEXP (SUBREG_REG (op0), 1))
- == (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (op0)))
- - GET_MODE_BITSIZE (mode)))
+ == GET_MODE_BITSIZE (inner_mode) - GET_MODE_BITSIZE (int_mode))
&& subreg_lowpart_p (op0))
{
rtx tmp = GEN_INT (INTVAL (XEXP (SUBREG_REG (op0), 1))
+ INTVAL (op1));
- machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
- tmp = simplify_gen_binary (code,
- GET_MODE (SUBREG_REG (op0)),
+ tmp = simplify_gen_binary (code, inner_mode,
XEXP (SUBREG_REG (op0), 0),
tmp);
- return lowpart_subreg (mode, tmp, inner_mode);
+ return lowpart_subreg (int_mode, tmp, inner_mode);
}
if (SHIFT_COUNT_TRUNCATED && CONST_INT_P (op1))