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Re: [RFC PATCH, i386]: Enable post-reload compare elimination pass


On Wed, May 10, 2017 at 09:57:56PM +0200, Uros Bizjak wrote:
> BTW: This patch now catches 417 cases (instead of 200+) in linux
> build, including e.g.:
> 
> (parallel [
>         (set (reg:CCZ 17 flags)
>             (compare:CCZ (lshiftrt:SI (reg:SI 4 si [orig:93 _10 ] [93])
>                     (const_int 1 [0x1]))
>                 (const_int 0 [0])))
>         (set (reg:DI 4 si)
>             (zero_extend:DI (lshiftrt:SI (reg:SI 4 si [orig:93 _10 ] [93])
>                     (const_int 1 [0x1]))))
>     ])

That looks nice.  So, I think we need analysis on what order which targets
use.  I have looked at mn10300.md, I see {add,sub}si3_flags patterns that
would need PARALLEL reordering for this compare-elim.c change and then
cmp_liw vs. liw_cmp patterns I have no clue what they do and whether
compare-elim.c would care about those or not (they have UNSPECs).  Jeff/Alex?

In rx.md I see {add,sub}si3_flags too, then ssaddsi3 and 2 peepholes that
would need changing.

In visium.md I see flags_subst_{logic,arith} define_substs,
*{add,sub}<mode>3_insn_set_{carry,overflow}
{add,sub}si3_insn_set_{carry,overflow}, negsi2_insn_set_carry
and *neg<mode>2_insn_set_overflow that would need changing.

aarch64 is the only remaining compare-elim.c enabled target
(one that defines TARGET_FLAGS_REGNUM), and that one seems to use
the same parallel order as i386.md, so compare-elim.c most likely just
doesn't work there at all.

So all in all, sounds like we need to change at least 17 patterns on 3
not very widely used targets.

	Jakub


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