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Re: [PATCH][AArch64] Improve Cortex-A53 shift bypass
- From: Wilco Dijkstra <Wilco dot Dijkstra at arm dot com>
- To: Richard Earnshaw <Richard dot Earnshaw at arm dot com>, GCC Patches <gcc-patches at gcc dot gnu dot org>
- Cc: nd <nd at arm dot com>, James Greenhalgh <James dot Greenhalgh at arm dot com>
- Date: Fri, 5 May 2017 16:02:46 +0000
- Subject: Re: [PATCH][AArch64] Improve Cortex-A53 shift bypass
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Richard Earnshaw (lists) wrote:
> --- a/gcc/config/arm/aarch-common.c
> +++ b/gcc/config/arm/aarch-common.c
> @@ -254,12 +254,7 @@ arm_no_early_alu_shift_dep (rtx producer, rtx consumer)
> return 0;
>
> if ((early_op = arm_find_shift_sub_rtx (op)))
> - {
> - if (REG_P (early_op))
> - early_op = op;
> -
> - return !reg_overlap_mentioned_p (value, early_op);
> - }
> + return !reg_overlap_mentioned_p (value, early_op);
>
> return 0;
> }
> This function is used by several aarch32 pipeline description models.
> What testing have you given it there. Are the changes appropriate for
> those cores as well?
arm_find_shift_sub_rtx can only ever return NULL_RTX or a shift rtx, so the
check for REG_P is dead code. Bootstrap passes on ARM too of course.
Wilco