Re: [PATCH][AArch64] Use 'x' constraint for vector HFmode multiplication by indexed element instructions

[Christophe Lyon <christophe dot lyon at linaro dot org>]

On 16 March 2017 at 10:29, Kyrill Tkachov <kyrylo.tkachov@foss.arm.com> wrote:
> Hi all,
>
> The advsimd-intrinsics.exp tests for the fmul and fmulx instructions that
> perform a multiplication by indexed element
> have started generating invalid assembly in my testing. For example:
> Error: register number out of range 0 to 15 at operand 3 -- `fmulx
> v24.8h,v23.8h,v22.h[0]'
>

Are you configuring gcc in a special way? I can see no failure on trunk
in advsimd-intrinsics tests at the moment.
Should the tests be improved?

Thanks,

Christophe

> The problem is that the indexed vector register (v22 in this case) has to be
> in V0-V15 when accessed as a 16-bit element.
> The constraints on the pattern don't reflect this. We already have the h_con
> constraint that's supposed to do what we want,
> but it incorrectly returns the "w" constraint for HF inner modes and it
> isn't applied in all the patterns that it needs to be
> (it's needed for the FMLA, FMLS, FMUL, FMULx by element patterns).
> This patch fixes those issues by changing h_con to return the "x" constraint
> for HF inner modes and applying it to all the operands
> that need it in aarch64-simd.md
>
> With this patch the advsimd-intrinsics.exp tests now generate valid assembly
> and don't complain, so no new regression tests are added.
>
> Bootstrapped and tested on aarch64-none-linux-gnu.
> Ok for trunk?
>
> Thanks,
> Kyrill
>
> 2017-03-16  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
>
>     * config/aarch64/iterators.md (h_con): Return "x" for V4HF and V8HF.
>     * config/aarch64/aarch64-simd.md (*aarch64_fma4_elt_from_dup<mode>):
>     Use h_con constraint for operand 1.
>     (*aarch64_fnma4_elt_from_dup<mode>): Likewise.
>     (*aarch64_mulx_elt_from_dup<mode>): Likewise for operand 2.