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This patch fixes PR target/78597 on PowerPC. The basic problem is conversion between unsigned int and _Float128 fails for 0x80000000. Both power{7,8} using simulated IEEE 128-bit floating point and power9 using hardware IEEE 128-bit failed in the same test. I cut down the patches I had developed for 79038 that are waiting for GCC 8 to open up to include the patches that fix the problem, but don't do additional improvements (optimizing conversions between char/short and _Float128, and optimizing converting _Float128 to int/short/char and storing the result). This patch is a little on the big side, because I deleted the two functions (convert_float128_to_int and (convert_int_to_float128) that were doing the integer/_Float128 conversions, and instead implemented them directly. I also deleted the various insns that those two functions called. It only affects _Float128/__float128 conversions. I have tested this on a little endian power8 system. Bootstrap passes, and the only changes in the test suite runs were the following tests now pass: gcc.dg/torture/fp-int-convert-float128-ieee.c gcc.dg/torture/fp-int-convert-float64x.c I did not add any tests, because it was covered by existing tests. Can I check this into trunk? 2017-01-30 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/78597 PR target/79038 * config/rs6000/rs6000-protos.h (convert_float128_to_int): Delete, no longer used. (convert_int_to_float128): Likewise. * config/rs6000/rs6000.c (convert_float128_to_int): Likewise. (convert_int_to_float128): Likewise. * config/rs6000/rs6000.md (UNSPEC_IEEE128_MOVE): Likewise. (UNSPEC_IEEE128_CONVERT): Likewise. (floatsi<mode>2, FLOAT128 iterator): Bypass calling rs6000_expand_float128_convert if we have IEEE 128-bit hardware. Use local variables for IBM extended format. (fix_trunc<mode>si2, FLOAT128 iterator): Likewise. (fix_trunc<mode>si2_fprs): Likewise. (fixuns_trunc<IEEE128:mode><SDI:mode>2): Likewise. (floatuns<IEEE128:mode>2, IEEE128 iterator): Likewise. (fix<uns>_<mode>si2_hw): Rework the IEEE 128-bt hardware support to know that we can now have integers of all sizes in vector registers. (fix<uns>_<mode>di2_hw): Likewise. (float<uns>_<mode>si2_hw): Likewise. (fix_<mode>si2_hw): Likewise. (fixuns_<mode>si2_hw): Likewise. (float<uns>_<mode>di2_hw): Likewise. (float_<mode>di2_hw): Likewise. (float_<mode>si2_hw): Likewise. (floatuns_<mode>di2_hw): Likewise. (floatuns_<mode>si2_hw): Likewise. (xscvqp<su>wz_<mode>): Delete, no longer used. (xscvqp<su>dz_<mode>): Likewise. (xscv<su>dqp_<mode>): Likewise. (ieee128_mfvsrd_64bit): Likewise. (ieee128_mfvsrd_32bit): Likewise. (ieee128_mfvsrwz): Likewise. (ieee128_mtvsrw): Likewise. (ieee128_mtvsrd_64bit): Likewise. (ieee128_mtvsrd_32bit): Likewise. -- Michael Meissner, IBM IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA email: meissner@linux.vnet.ibm.com, phone: +1 (978) 899-4797
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