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Hi, During embedded-6-branch testing we discovered that the patch for PR71607, that I backported to embedded-6-branch, broke cortex-m0 due to the new implementation of TARGET_USE_BLOCKS_FOR_CONSTANT_P. What changed is that TARGET_USE_BLOCKS_FOR_CONSTANT_P did not used to be defined by ARM and thus it used the default implementation which always returned false. I read over that detail last time... The current implementation on embedded-6 returns false if arm_disable_literal_pool is true and true otherwise. As I said I had not expected this function to already be returning false to begin with. This does however mean that we do not (correctly?) use this target hook to control what goes into literal pools in text and what not. It also means we don't need to for -mslow-flash-data as and since it breaks cortex-m0 I will be removing it, reverting back to the default implementation. I will be changing the patch for trunk to reflect these findings, even though this did not show up during trunk testing. Tested with various arm-none-eabi configurations: -mcpu=cortex-m0/m3/m7 and -march=armv8-m.baseline. Cheers, Andre gcc/ChangeLog.arm: 2016-12-14 Andre Vieira <andre.simoesdiasvieira@arm.com> * config/arm/arm.c (TARGET_USE_BLOCKS_FOR_CONSTANT_P): Remove. (arm_use_blocks_for_constant_p): Remove. gcc/testsuite/ChangeLog.arm: 2016-12-14 Andre Vieira <andre.simoesdiasvieira@arm.com> * gcc.target/arm/thumb2-slow-flash-data-3.c: Add extra scan. * gcc.target/arm/thumb2-slow-flash-data-5.c: Likewise.
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