Re: [PATCHv3] [AARCH64] Add variant support to -m="native"and add thunderxt88p1.

[Andrew Pinski <pinskia at gmail dot com>]

On Sat, Nov 26, 2016 at 1:54 PM, Andrew Pinski <pinskia@gmail.com> wrote:
> On Tue, Nov 1, 2016 at 11:08 AM, Andrew Pinski <pinskia@gmail.com> wrote:
>> On Tue, Nov 17, 2015 at 2:10 PM, Andrew Pinski <apinski@cavium.com> wrote:
>>> Since ThunderX T88 pass 1 (variant 0) is a ARMv8 part while pass 2 (variant 1)
>>> is an ARMv8.1 part, I needed to add detecting of the variant also for this
>>> difference. Also I simplify a little bit and combined the single core and
>>> arch detecting cases so it would be easier to add variant.
>>
>> Actually it is a bit more complex than what I said here, see below for
>> the full table of options and what are enabled/disabled now.
>>
>>> OK?  Bootstrapped and tested on aarch64-linux-gnu with no regressions.
>>> Tested -mcpu=native on both T88 pass 1 and T88 pass 2 to make sure it is
>>> deecting the two seperately.
>>
>>
>> Here is the final patch in this series updated; I changed the cpu name
>> slightly and made sure I updated invoke.texi too.
>>
>> The names are going to match the names in LLVM (worked with our LLVM
>> engineer here at Cavium about the names).
>> Here are the names recorded and
>> -mpcu=thunderx:
>> *        Matches part num 0xA0 (reserved for ThunderX 8x series)
>> *        T88 Pass 2 scheduling
>> *        Hardware prefetching (software prefetching disabled)
>> *        LSE enabled
>> *        no v8.1
>>
>> -mcpu=thunderxt88:
>> *        Matches part num 0xA1
>> *        T88 Pass 2 scheduling
>> *        software prefetching enabled
>> *        LSE enabled
>> *        no v8.1
>>
>> -mcpu=thunderxt88p1 (only for GCC):
>> *        Matches part num 0xA1, variant 0
>> *        T88 Pass 1 scheduling
>> *        software prefetching enabled
>> *        no LSE enabled
>> *        no v8.1
>>
>> -mcpu=thunderxt81 and -mcpu=thunderxt83:
>> *        Matches part num 0xA2/0xA3
>> *        T88 Pass 2 scheduling
>> *        Hardware prefetching (software prefetching disabled)
>> *        LSE enabled
>> *        v8.1
>>
>>
>> I have not hooked up software vs hardware prefetching and the
>> scheduler parts (the next patch will do part of that); both ARMv8.1-a
>> and LSE parts are hooked up as those parts are only in
>> aarch64-cores.def.
>>
>> OK?  Bootstrapped and tested on ThunderX T88 and ThunderX T81
>> (aarch64-linux-gnu).
>
> Here is the latest version of the patch.  Updated for the latest
> additions of "falkor".   Also added a comment about the order of
> "thunderxt88p1" and "thunderxt88".
>
> OK?  Bootstrapped and tested on arrch64-linux-gnu with no regressions.

Ping?

>
> Thanks,
> Andrew Pinski
>
> ChangeLog:
>
> * config/aarch64/aarch64-cores.def: Add -1 as the variant to all of the cores.
> (thunderx): Update to include LSE by default.
> (thunderxt88p1): New core.
> (thunderxt88): New core.
> (thunderxt81): New core.
> (thunderxt83): New core.
> * config/aarch64/driver-aarch64.c (struct aarch64_core_data): Add variant field.
> (ALL_VARIANTS): New define.
> (AARCH64_CORE): Support VARIANT operand.
> (cpu_data): Likewise.
> (host_detect_local_cpu): Parse variant field of /proc/cpuinfo.  Combine the arch
> and single core case and support variant searching.
> * common/config/aarch64/aarch64-common.c (AARCH64_CORE): Add VARIANT operand.
> * config/aarch64/aarch64-opts.h (AARCH64_CORE): Likewise.
> * config/aarch64/aarch64.c (AARCH64_CORE): Likewise.
> * config/aarch64/aarch64.h (AARCH64_CORE): Likewise.
> * config/aarch64/aarch64-tune.md: Regenerate.
>
> * doc/invoke.texi (AARCH64/mtune): Document thunderxt88,
> thunderxt88p1, thunderxt81, thunderxt83 as available options.