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Re: [PATCH, 3 of 4], Enhance PowerPC vec_extract support for power8/power9 machines

On Sat, Jul 30, 2016 at 11:37:46AM -0400, Michael Meissner wrote:
> I noticed I forgot to include one of the changes in the ChangeLog file
> (rtx_is_swappable_p).  This change was originally meant to be in the previous
> patch, and it got left out.  The corrected ChangeLog is:

But put it on the correct file please (rs6000.c) ;-)


> 	* config/rs6000/rs6000-protos.h (rs6000_adjust_vec_address): New
> 	function that takes a vector memory address, a hard register, an
> 	element number and a temporary base register, and recreates an
> 	address that points to the appropriate element within the vector.
> 	* config/rs6000/rs6000.c (rs6000_adjust_vec_address): Likewise.
> 	(rs6000_split_vec_extract_var): Add support for the target of a
> 	vec_extract with variable element number being a scalar memory
> 	location.
> 	* config/rs6000/ (vsx_extract_<mode>_load): Replace
> 	vsx_extract_<mode>_load insn with a new insn that optimizes
> 	storing either element to a memory location, using scratch
> 	registers to pick apart the vector and reconstruct the address.
> 	(vsx_extract_<P:mode>_<VSX_D:mode>_load): Likewise.
> 	(vsx_extract_<mode>_store): Rework alternatives to more correctly
> 	support Altivec registers.  Add support for ISA 3.0 Altivec d-form
> 	store instruction.
> 	(vsx_extract_<mode>_var): Add support for extracting a variable
> 	element number from memory.
> 	(rtx_is_swappable_p): VLSO insns (UNSPEC_VSX_VSLOW) are not
> 	swappable.

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