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Re: [AArch64][5/14] ARMv8.2-A FP16 lane vector intrinsics


On Thu, Jul 07, 2016 at 05:16:28PM +0100, Jiong Wang wrote:
> This patch add ARMv8.2-A FP16 lane vector intrinsics.
> 
> Lane intrinsics are generally derivatives of multiply intrinsics,
> including multiply accumulate.  All necessary backend support for them
> are there already except fmulx, the implementions are largely a
> combination of existed multiply intrinsics with vdup intrinsics

OK.

Thanks,
James

> 2016-07-07  Jiong Wang <jiong.wang@arm.com>
> 
> gcc/
>         * config/aarch64/aarch64-simd.md
> (*aarch64_mulx_elt_to_64v2df): Rename to
>         "*aarch64_mulx_elt_from_dup<mode>".
>         (*aarch64_mul3_elt<mode>): Update schedule type.
>         (*aarch64_mul3_elt_from_dup<mode>): Likewise.
>         (*aarch64_fma4_elt_from_dup<mode>): Likewise.
>         (*aarch64_fnma4_elt_from_dup<mode>): Likewise.
>         * config/aarch64/iterators.md (VMUL): Supprt half precision
> float modes.
>         (f, fp): Support HF modes.
>         * config/aarch64/arm_neon.h (vfma_lane_f16): New.
>         (vfmaq_lane_f16): Likewise.
>         (vfma_laneq_f16): Likewise.
>         (vfmaq_laneq_f16): Likewise.
>         (vfma_n_f16): Likewise.
>         (vfmaq_n_f16): Likewise.
>         (vfms_lane_f16): Likewise.
>         (vfmsq_lane_f16): Likewise.
>         (vfms_laneq_f16): Likewise.
>         (vfmsq_laneq_f16): Likewise.
>         (vfms_n_f16): Likewise.
>         (vfmsq_n_f16): Likewise.
>         (vmul_lane_f16): Likewise.
>         (vmulq_lane_f16): Likewise.
>         (vmul_laneq_f16): Likewise.
>         (vmulq_laneq_f16): Likewise.
>         (vmul_n_f16): Likewise.
>         (vmulq_n_f16): Likewise.
>         (vmulx_lane_f16): Likewise.
>         (vmulxq_lane_f16): Likewise.
>         (vmulx_laneq_f16): Likewise.
>         (vmulxq_laneq_f16): Likewise.
> 


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