[PATCH], Add PowerPC ISA 3.0 MTVSRDD support

[Michael Meissner <meissner at linux dot vnet dot ibm dot com>]

This patch adds support to issue the MTVSRDD on 64-bit ISA 3.0 systems when the
compiler has a 64-bit value in a GPR, and it wants to create a vector that has
the 64-bit value in both sides of the 128-bit value.

In addition, I simplified the alternatives, eliminating the use of separate
alternatives for a preferred register class and a normal register class.  This
is similar to the change I did for the 128-bit moves previously.

I have done bootstraps on a little endian power8 system with no regressions,
and I have a run on a big endian power7 system in progress.  Assuming the
power7 system does not introduce any new errors, is this patch ok to install in
the trunk.  I also plan to install the patch in the 6.2 branch when the other
ISA 3.0 patches are back ported.

[gcc]
2016-05-31  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/vsx.md (vsx_splat_<mode>, V2DI/V2DF): Simplify
	alternatives, eliminating preferred register class.  Add support
	for the MTVSRDD instruction in ISA 3.0.
	(vsx_splat_v4si_internal): Use splat_input_operand instead of
	reg_or_indexed_operand.
	(vsx_splat_v4sf_internal): Likewise.

[gcc/testsuite]
2016-05-31  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* gcc.target/powerpc/p9-splat-4.c: New test.

-- 
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meissner@linux.vnet.ibm.com, phone: +1 (978) 899-4797

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