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Re: [AArch64, 6/6] Reimplement vpadd intrinsics & extend rtl patterns to all modes
- From: James Greenhalgh <james dot greenhalgh at arm dot com>
- To: Jiong Wang <jiong dot wang at foss dot arm dot com>
- Cc: GCC Patches <gcc-patches at gcc dot gnu dot org>, <nd at arm dot com>
- Date: Fri, 27 May 2016 14:42:56 +0100
- Subject: Re: [AArch64, 6/6] Reimplement vpadd intrinsics & extend rtl patterns to all modes
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On Tue, May 24, 2016 at 09:24:03AM +0100, Jiong Wang wrote:
> These intrinsics was implemented by inline assembly using "faddp"
> instruction.
> There was a pattern "aarch64_addpv4sf" which supportsV4SF mode only
> while we can
> extend this pattern to support VDQF mode, then we can reimplement these
> intrinsics through builtlins.
>
> gcc/
> 2016-05-23 Jiong Wang <jiong.wang@arm.com>
>
> * config/aarch64/aarch64-builtins.def (faddp): New builtins
> for modes in VDQF.
> * config/aarch64/aarch64-simd.md (aarch64_faddp<mode>): New.
> (arch64_addpv4sf): Delete.
> (reduc_plus_scal_v4sf): Use "gen_aarch64_faddpv4sf" instead of
> "gen_aarch64_addpv4sf".
> * gcc/config/aarch64/iterators.md (UNSPEC_FADDP): New.
> * config/aarch64/arm_neon.h (vpadd_f32): Remove inline
> assembly. Use
> builtin.
> (vpaddq_f32): Likewise.
> (vpaddq_f64): Likewise.
This ChangeLog format is incorrect.
You've missed vpaddd_f64 and vpadds_f32, could you add those?
Thanks,
James