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RE: [Patch,microblaze]: Better register allocation to minimize the spill and fetch.



-----Original Message-----
From: Mike Stump [mailto:mikestump@comcast.net] 
Sent: Tuesday, February 02, 2016 12:12 AM
To: Ajit Kumar Agarwal
Cc: GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida; Nagaraju Mekala
Subject: Re: [Patch,microblaze]: Better register allocation to minimize the spill and fetch.

On Jan 29, 2016, at 2:31 AM, Ajit Kumar Agarwal <ajit.kumar.agarwal@xilinx.com> wrote:
> 
> This patch improves the allocation of registers in the given function.

>>Is it just me, or, would it be even better to change the abi and make MB_ABI_ASM_TEMP_REGNUM be allocated by the register allocator?

Yes, it would be even better to make r18 (MB_ABI_ASM_TEMP_REGNUM) to be allocated by the register allocator
for the given function. Currently r18 is marked as FIXED_REGISTERS and cannot be allocated to the given function only
used for temporaries where the liveness is limited. R18 is used in some of the shift patterns and also for the conditional
branches temporaries.

I have made some of the ABI changes making r18 as not FIXED_REGISTERS in my local branch and the given function can
be allocated with r18.This will reduce the spill and fetch to a great extent and I am seeing good amount of gains with this 
change for Mibench/EEMBC benchmarks.

Since the ABI specifies  r18 is reserved for assembler temporaries, lot of kernel driven code and glibc code  uses
 r18 as a temporaries for inline assembly. Changing the ABI requires lot of changes in the kernel specific code for
Microblaze where r18 is used as a temporary without storing and fetching after the scope is gone.

Currently we don't have  plans to change the ABI that might break the existing Kernel and GLIBC code. Changing
the ABI require a good amount of work to be done in Kernel and GLIBC code for Microblaze.

Thanks & Regards
Ajit


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