Hi all,
In this PR we fail to if-convert a case where in the expression x = c ?
a : b;
'a' and 'b' are something like x + 1 and x - 1.
So x appears in a and b.
The code that checks that nothing from the else block modifies the
registers used in a
rejects this case. It should accept when the modification is in the last
insn of the block
i.e. insn_a or insn_b in the language of noce_try_cmove_arith because we
will not be
emitting insn_a and insn_b verbatim, but rather their modified versions
emit_a and emit_b
that have had their destinations modified to fresh pseudos, so no
conflicts will arise.
Bootstrapped and tested on arm, aarch64, x86_64.
This improved if-conversion opportunities a bit across SPEC2006, not so
much as to make
a difference, but definitely a small improvement.
Ok for trunk?
Thanks,
Kyrill
2015-11-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR rtl-optimization/68435
* ifcvt.c (noce_try_cmove_arith): Skip final insn when checking
for clonflicts between a, b and the set destinations.
2015-11-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR rtl-optimization/68435
* gcc.dg/pr68435.c: New test.