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Re: [PATCH] lround for PowerPC
- From: David Edelsohn <dje dot gcc at gmail dot com>
- To: Michael Meissner <meissner at linux dot vnet dot ibm dot com>, Richard Biener <richard dot guenther at gmail dot com>, Segher Boessenkool <segher at kernel dot crashing dot org>, "William J. Schmidt" <wschmidt at linux dot vnet dot ibm dot com>, GCC Patches <gcc-patches at gcc dot gnu dot org>
- Date: Mon, 23 Nov 2015 19:04:33 -0500
- Subject: Re: [PATCH] lround for PowerPC
- Authentication-results: sourceware.org; auth=none
- References: <CAGWvnynJ8bDp-NF6YsZKF1ENRY-tGquqCmMHaEz4ZiMvR7r4kw at mail dot gmail dot com> <F75D0D75-95E8-4A66-8A17-1976282B462E at gmail dot com> <CAGWvnyneQsmykM7hsp8M8WVHgaMh_P1cYEdywyMUewunmExgrA at mail dot gmail dot com> <20151123215623 dot GA21427 at ibm-tiger dot the-meissners dot org>
On Mon, Nov 23, 2015 at 4:56 PM, Michael Meissner
<meissner@linux.vnet.ibm.com> wrote:
> David ping'ed me on internal IRC, and I had a thinko in terms of the use of the
> <Fv> mode attribute. In some of the uses (such as abs, smax, etc.) we want to
> use ISA 2.06 instructions on SFmode, while in other uses (add, mul, etc.) we
> want to use it only if we have the ISA 2.07 instrucitons.
>
> I have split these mode attributes into Fv and Fv2 and gone through all of the
> uses in the compiler to use the appropriate attribute. I have built a cross
> compiler on x86, but it blew up on a big endian power7 with a segmentation
> violation that I need to look into. I'm also building on a little endian
> power8 right now, and it has gotten further.
>
> 2015-11-23 David Edelsohn <dje.gcc@gmail.com>
> Michael Meissner <meissner@linux.vnet.ibm.com>
>
> * config/rs6000/rs6000.md (UNSPEC_XSRDPI): New unspec.
> (Fv2): New mode attribute to be used when ISA 2.06 instructions
> are used on SF/DF values.
> (abs<mode>2_fpr): Use <Fv2> instead of <Fv>.
> (nabs<mode>2_fpr): Likewise.
> (neg<mode>2_fpr): Likewise.
> (copysign<mode>3_fcpsgn): Likewise.
> (smax<mode>3_vsx): Likewise.
> (smin<mode>3_vsx): Likewise.
> (floatsi<mode>2_lfiwax): Likewise.
> (floatunssi<mode>2_lfiwz): Likewise.
> (fctiwz_<mode>): Likewise.
> (fctiwuz_<mode>): Likewise.
> (btrunc<mode>2): Likewise.
> (ceil<mode>2): Likewise.
> (floor<mode>2): Likewise.
> (xsrdpi<mode>): Add support for the lround function.
> (lround<mode>2): Likewise.
I would prefer that you reverse the meaning of "Fv" and "Fv2". "Fv"
corresponds to VSX2 and "Fv2" corresponds to VSX, which is confusing
for anyone trying to make sense of this in the future.
Also, the lround<mode>di2 pattern should use "Fv" not "wa" from my
original patch. And the ChangeLog entry should list lround<mode>di2.
Okay with those changes, after the cause of the SEGV is diagnosed and fixed.
Thanks, David