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Re: [PATCH][AArch64] Replace insn to zero up DF register

From: Evandro Menezes <e dot menezes at samsung dot com>
To: Marcus Shawcroft <marcus dot shawcroft at gmail dot com>
Cc: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>, Marcus Shawcroft <Marcus dot Shawcroft at arm dot com>, Kyrill Tkachov <kyrylo dot tkachov at arm dot com>
Date: Thu, 19 Nov 2015 16:01:09 -0600
Subject: Re: [PATCH][AArch64] Replace insn to zero up DF register
Authentication-results: sourceware.org; auth=none
References: <56257F53 dot 2000905 at samsung dot com> <CAFqB+Pwu_s+metkuMdXx84EVFXfXo3eSr-YSPRpk-81MsXuZnQ at mail dot gmail dot com>

On 10/30/2015 05:24 AM, Marcus Shawcroft wrote:

On 20 October 2015 at 00:40, Evandro Menezes <e.menezes@samsung.com> wrote:

In the existing targets, it seems that it's always faster to zero up a DF
register with "movi %d0, #0" instead of "fmov %d0, xzr".

This patch modifies the respective pattern.


Hi Evandro,

This patch changes the generic, u architecture independent instruction
selection. The ARM ARM (C3.5.3) makes a specific recommendation about
the choice of instruction in this situation and the current
implementation in GCC follows that recommendation.  Wilco has also
picked up on this issue he has the same patch internal to ARM along
with an ongoing discussion with ARM architecture folk regarding this
recommendation.  I'm reluctant to take this patch right now on the
basis that it runs contrary to ARM ARM recommendation pending the
conclusion of Wilco's discussion with ARM architecture folk.


Ping.

--
Evandro Menezes

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