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Re: [PATCH] g++.dg/init/vbase1.C and g++.dg/cpp/ucn-1.C


> No RISC architecture can store directly to MEM, so the expected RTL in
> g++.dg/init/vbase1.C is wrong.  I am adding XFAIL for PowerPC.  This
> probably should be disabled for ARM and other RISC architectures.

Some of them can store 0 directly to MEM though, for example SPARC.

-- 
Eric Botcazou


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