[PATCH/RFTesting][MIPS] Migrate reduction optabs in mips-ps-3d.md

[Alan Lawrence <alan dot lawrence at arm dot com>]

There are still a few uses of the old reduc_[us](plus|min|max)_<mode> optabs
remaining. This migrates the instances in mips-ps-3d.md.

This seemed straightforward, as mips-ps-3d.md also provides a vec_extractv2sf.
I tried to be conservative and handle all the possible cases for endianness,
this may be overkill. Also I believe TARGET_MIPS3D implies
TARGET_PAIRED_SINGLE_FLOAT.

I've built stage-1 compilers for mips64el and mips64, and verified that these
did at least (both) compile the affected code. However I haven't tested any
further, I'm not sure what command-line options etc. to use for this. I wonder
if one of the kind MIPS folk would be able to assist with testing?

--Alan

gcc/ChangeLog:

	* config/mips/mips-ps-3d.md (reduc_splus_v2sf): Remove.
	(reduc_plus_scal_v2sf): New.
---
 gcc/config/mips/mips-ps-3d.md | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/gcc/config/mips/mips-ps-3d.md b/gcc/config/mips/mips-ps-3d.md
index 8bc7608..01e6753 100644
--- a/gcc/config/mips/mips-ps-3d.md
+++ b/gcc/config/mips/mips-ps-3d.md
@@ -371,13 +371,17 @@
   [(set_attr "type" "fadd")
    (set_attr "mode" "SF")])
 
-(define_insn "reduc_splus_v2sf"
-  [(set (match_operand:V2SF 0 "register_operand" "=f")
-	(unspec:V2SF [(match_operand:V2SF 1 "register_operand" "f")
-		      (match_dup 1)]
-		     UNSPEC_ADDR_PS))]
+(define_expand "reduc_plus_scal_v2sf"
+  [(match_operand:SF 0 "register_operand" "=f")
+   (match_operand:V2SF 1 "register_operand" "f")]
   "TARGET_HARD_FLOAT && TARGET_MIPS3D"
-  "")
+  {
+    rtx temp = gen_reg_rtx (V2SFmode);
+    emit_insn (gen_mips_addr_ps (temp, operands[1], operands[1]));
+    rtx lane = BYTES_BIG_ENDIAN ? const1_rtx : const0_rtx;
+    emit_insn (gen_vec_extractv2sf (operands[0], temp, lane));
+    DONE;
+  })
 
 ; cvt.pw.ps - Floating Point Convert Paired Single to Paired Word
 (define_insn "mips_cvt_pw_ps"
-- 
1.9.1