Re: [PATCH v2 0/3] [ARM] PR63870 vldN_lane/vstN_lane error messages

[Charles Baylis <charles dot baylis at linaro dot org>]

On 7 October 2015 at 00:59,  <charles.baylis@linaro.org> wrote:
> From: Charles Baylis <charles.baylis@linaro.org>
>
> This patch series fixes up the error messages for single lane vector
> load/stores, similarly to AArch64.
>
> make check on arm-linux-gnueabihf/qemu completes with no new regressions.
>
> Changes since the last version:
> . removed the duplicate arm_neon_lane_bounds function
> . resolved conflicts with other NEON work
> . whitespace clean up
>

A bit more info is required here.

Original patch submission was at:
https://gcc.gnu.org/ml/gcc-patches/2015-07/msg00142.html

> Charles Baylis (3):
>   [ARM] PR63870 Add qualifiers for NEON builtins

This adds the qualifier_struct_load_store_lane_index qualifier, ported
from my AArch64 changes. This causes the lane bounds check to be
performed and, on big-endian targets, reverses the lane number used in
the RTL (in common with other NEON patterns). This isn't strictly
required for correctness, since the vectorizer never generates these
patterns, but the consistency seems like a good idea.

>   [ARM] PR63870 Mark lane indices of vldN/vstN with appropriate
>     qualifier

This marks the builtins with qualifier_struct_load_store_lane_index.
The patterns are also updated to un-reverse the lane order at assembly
time.

>   [ARM] PR63870 Enable test cases for ARM

Removes the xfails from the test cases.