This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: [ARM] Fix PR middle-end/65958


> If I read aarch64_emit_probe_stack_range correctly, these two
> instructions are generated when (size <= PROBE_INTERVAL).  If
> size <= 4 * PROBE_INTERVAL, more instructions are generated,
> 
>          sub x9, sp, #16384
>          str xzr, [x9]
> 
>          sub x9, x9, #PROBE_INTERVAL
>          str xzr, [x9]
> 	... /* At most two instances of these two insn. */
> 
>          either
>          sub x9, x9, #PROBE_INTERVAL
>          str xzr, [x9, #offset]
>          or
>          str xzr, [x9, -16]
> 
> > A probing loop uses both x9 and x10:
> > 	sub	x9, sp, #12288
> > 	sub	x10, sp, #36864
> > 
> > LPSRL0:
> > 	sub	x9, x9, 4096
> > 	str	xzr, [x9]
> > 	cmp	x9, x10
> > 	b.ne	LPSRL0
> 
> The probing loop is used when size > 4 * PROBE_INTERVAL
> 
> > with an optional last probe:
> > 	str	xzr, [x10,#-16]
> 
> and there can be an optional instruction before the probe,
> 
> 	sub x10, x10, #PROBE_INTERVAL
> 
> Let me know if my understanding above is wrong.

That's correct, probes can come with a 'sub' instruction just before.

> s/aarch64_output_probe_stack-range/aarch64_output_probe_stack_range

Thanks, will fix.

-- 
Eric Botcazou


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]