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Re: [PATCH] x86 interrupt attribute
- From: "H.J. Lu" <hjl dot tools at gmail dot com>
- To: Uros Bizjak <ubizjak at gmail dot com>
- Cc: Yulia Koval <vaalfreja at gmail dot com>, Mike Stump <mikestump at comcast dot net>, GCC Patches <gcc-patches at gcc dot gnu dot org>
- Date: Sun, 4 Oct 2015 16:17:01 -0700
- Subject: Re: [PATCH] x86 interrupt attribute
- Authentication-results: sourceware.org; auth=none
- References: <CAE0nxxi-T8da1=dXkHem2m6d_2RramotAU3HY=UqFkmT0kW=RQ at mail dot gmail dot com> <2AB9494F-91EC-4CF6-945B-0CB03A583513 at comcast dot net> <CAMe9rOpMB9fnj_ZS7h122BuODsf9TZNOUvWVzrYvLN8VxGiFkg at mail dot gmail dot com> <CAMe9rOoeorsg06XxtNr1-iNX_m-Fe8gtsW2uXs_M2+EOw+gLqg at mail dot gmail dot com> <F096FB33-4A00-4D7B-8C9B-3FE8ACE7FEF9 at comcast dot net> <CAMe9rOoDBMKGeUBJjCrGQQNnFE559gxZwhvWOXT8gn9Zo68nsQ at mail dot gmail dot com> <1D91C2C8-833D-4F6D-9C57-C22D61662A83 at comcast dot net> <CAMe9rOoig1gcjaQLqCAE4o3OehBBgkCwN2wHDatqB=QhykEp6A at mail dot gmail dot com> <CAMe9rOr3nVJnxi_ib=pZrDjuUNX6nzqQwRM7_WLBAYm-_63yhg at mail dot gmail dot com> <CAE0nxxg99PaOCbD2naRRgSMYs7Scc5KvQ2SFdQcLqB8yO+yh=A at mail dot gmail dot com> <CAMe9rOoMJ-RWPLn_GiqK0tTDb26QhKKM4n9c+=E8VRMkfJKX3Q at mail dot gmail dot com> <CAE0nxxhFg9EAxoee9gKxUQcDT=2mFb4=eCM4c4fgcZECCGwCeQ at mail dot gmail dot com> <CAMe9rOoD_P1+wq_Cwho+J_2iMTz+eAhAhJDHiDVQ4vgbKQ6-4g at mail dot gmail dot com> <CAFULd4Z1KwtbAXdajkAWQP7=7WDJ23W822tnHG=T74-5ns7Xhw at mail dot gmail dot com> <CAMe9rOpDg1uQEQB+tqmo7zgtJoe7NNfCDWGqJT4E+k0+kB+Grg at mail dot gmail dot com> <CAFULd4Z46bnJBU_Gjpi=WjnUT+fXQ=MOFK-WgEOLiWfiqdXxfg at mail dot gmail dot com> <CAE0nxxgdzEu6XqpNL53JA4MTMn2GBSEjR0-o=jyAw3yfNpY+kQ at mail dot gmail dot com> <CAFULd4bWJeTBO-z8a1a2_Uvtn=dJ4dgnGFJNPRi__7tJCK8Qng at mail dot gmail dot com> <CAE0nxxjRQoj9oC5RYC5D3pifSXJmL14cS+FRsaK_kg3a7GfP7Q at mail dot gmail dot com> <CAE0nxxi96xKvDToAQC64k9L-FFn1bMunzDS2y-cCxCEvvPnmzA at mail dot gmail dot com> <CAFULd4Y-A6vMaXJ1+EzkFexJ7xeWb3ri=XpHAK1UCXGFB0si4w at mail dot gmail dot com> <CAMe9rOr10=jGtVQ3-NwLOhmE4HmW20KCmM+7+UenH5TOxS_ZQQ at mail dot gmail dot com> <CAFULd4aMx+c0eyZmap8LNBNcjj=mbz4kRWv+V5GM3ZAPDP3vXg at mail dot gmail dot com> <CAMe9rOor=EtOmX_q2Wz8UcCNhPm2YR1nyPB6UgxmffOU_PHLkw at mail dot gmail dot com> <CAFULd4ay3bdk4rCpCc6zQReOyLYPxzZEgikKVcei4G+FLrSacA at mail dot gmail dot com>
On Sun, Oct 4, 2015 at 2:07 PM, Uros Bizjak <ubizjak@gmail.com> wrote:
> On Sun, Oct 4, 2015 at 10:51 PM, H.J. Lu <hjl.tools@gmail.com> wrote:
>> On Sun, Oct 4, 2015 at 1:00 PM, Uros Bizjak <ubizjak@gmail.com> wrote:
>>> On Sun, Oct 4, 2015 at 8:15 PM, H.J. Lu <hjl.tools@gmail.com> wrote:
>>>
>>>>> Looking a bit deeper into the code, it looks that we want to realign
>>>>> the stack in the interrupt handler. Let's assume that interrupt
>>>>> handler is calling some other function that saves SSE vector regs to
>>>>> the stack. According to the x86 ABI, incoming stack of the called
>>>>> function is assumed to be aligned to 16 bytes. But, interrupt handler
>>>>> violates this assumption, since the stack could be aligned to only 4
>>>>> bytes for 32bit and 8 bytes for 64bit targets. Entering the called
>>>>> function with stack, aligned to less than 16 bytes will certainly
>>>>> violate ABI.
>>>>>
>>>>> So, it looks to me that we need to realign the stack in the interrupt
>>>>> handler unconditionally to 16bytes. In this case, we also won't need
>>>>> the following changes:
>>>>>
>>>>
>>>> Current stack alignment implementation requires at least
>>>> one, maybe two, scratch registers:
>>>>
>>>> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67841
>>>>
>>>> Extend it to the interrupt handler, which doesn't have any scratch
>>>> registers may require significant changes in backend as well as
>>>> register allocator.
>>>
>>> But without realignment, the handler is unusable for anything but
>>> simple functions. The handler will crash when called function will try
>>> to save vector reg to stack.
>>>
>>
>> We can use unaligned load and store to avoid crash.
>
> Oh, sorry, I meant "called function will crash", like:
>
> -> interrupt when %rsp = 0x...8 ->
> -> interrupt handler ->
> -> calls some function that tries to save xmm reg to stack
> -> crash in the called function
>
It should be fixed by this patch. But we need to fix stack
alignment in interrupt handler to avoid scratch register.
--
H.J.
---
commit 15f48be1dc7ff48207927d0b835e593d058f695b
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Sun Oct 4 16:14:03 2015 -0700
Correctly set incoming stack boundary for interrupt handler
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 7ebdcd9..0f0cc3c 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -12037,8 +12037,11 @@ ix86_minimum_incoming_stack_boundary (bool sibcall)
{
unsigned int incoming_stack_boundary;
+ /* Stack of interrupt handler is always aligned to word_mode. */
+ if (cfun->machine->func_type != TYPE_NORMAL)
+ incoming_stack_boundary = TARGET_64BIT ? 64 : 32;
/* Prefer the one specified at command line. */
- if (ix86_user_incoming_stack_boundary)
+ else if (ix86_user_incoming_stack_boundary)
incoming_stack_boundary = ix86_user_incoming_stack_boundary;
/* In 32bit, use MIN_STACK_BOUNDARY for incoming stack boundary
if -mstackrealign is used, it isn't used for sibcall check and