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Re: [PATCH, i386]: Fix PR 66814, ICE: gcc.target/i386/avx512f-klogic-2.c
- From: Jakub Jelinek <jakub at redhat dot com>
- To: Uros Bizjak <ubizjak at gmail dot com>
- Cc: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
- Date: Thu, 9 Jul 2015 21:38:08 +0200
- Subject: Re: [PATCH, i386]: Fix PR 66814, ICE: gcc.target/i386/avx512f-klogic-2.c
- Authentication-results: sourceware.org; auth=none
- References: <CAFULd4YsmWZORJRX+4+HVEV3zWLco8by1iWsvFLvTXXd+OrU4A at mail dot gmail dot com>
- Reply-to: Jakub Jelinek <jakub at redhat dot com>
On Thu, Jul 09, 2015 at 05:22:33PM +0200, Uros Bizjak wrote:
> Hello!
>
> This ICE was caused by a peephole2 pattern that allowed non-general
> regs arguments.
>
> 2015-07-08 Uros Bizjak <ubizjak@gmail.com>
>
> PR target/66814
> * config/i386/predicates.md (nonimmediate_gr_operand): New predicate.
> * config/i386/i386.md (not peephole2): Use nonimmediate_gr_operand.
> (varous peephole2s): Use {GENERAL,SSE,MMX}_REGNO_P instead of
> {GENERAL_SSE_MMX}_REG_P where appropriate.
This patch breaks bootstrap with rtl checking on x86_64-linux.
../../gcc/tree-vect-loop.c: In function âvoid calc_vec_perm_mask_for_shift(machine_mode, unsigned int, unsigned char*)â:
../../gcc/tree-vect-loop.c:3190:1: internal compiler error: RTL check: expected code 'reg', have 'subreg' in rhs_regno, at rtl.h:1782
}
^
0x11a44ef rtl_check_failed_code1(rtx_def const*, rtx_code, char const*, int, char const*)
../../gcc/rtl.c:786
0x19e917c rhs_regno
../../gcc/rtl.h:1782
0x1d20eea peephole2_10
../../gcc/config/i386/i386.md:17699
0x1d2ccc8 peephole2_insns(rtx_def*, rtx_insn*, int*)
../../gcc/config/i386/i386.md:5050
0x11190e0 peephole2_optimize
../../gcc/recog.c:3627
0x111a81f rest_of_handle_peephole2
../../gcc/recog.c:3807
0x111a8d4 execute
../../gcc/recog.c:3841
register_operand allows a SUBREG even after a reload, as long as
it is a SUBREG of a REG_P.
insn in question is:
(insn 75 71 76 2 (set (subreg:SI (reg:DI 2 cx) 0)
(const_int -1 [0xffffffffffffffff])) ../../gcc/tree-vect-loop.c:3189 -1
(nil))
and has been created by the:
;; After splitting up read-modify operations, array accesses with memory
;; operands might end up in form:
;; sall $2, %eax
;; movl 4(%esp), %edx
;; addl %edx, %eax
;; instead of pre-splitting:
;; sall $2, %eax
;; addl 4(%esp), %eax
;; Turn it into:
;; movl 4(%esp), %edx
;; leal (%edx,%eax,4), %eax
peephole2.
Wonder if
if (mode != word_mode)
operands[1] = gen_rtx_SUBREG (mode, operands[1], 0);
if (op1mode != word_mode)
operands[5] = gen_rtx_SUBREG (op1mode, operands[5], 0);
should not have been gen_lowpart instead of gen_rtx_SUBREG.
In any case, it wouldn't surprise me if there aren't many other ways
how to get a SUBREG in there.
Jakub